纳米级集成电路软错误的分辨测试、分离分析与加固关键技术

Nano-scale integrated circuits (IC) are extremely sensitive to radiation-induced soft errors, and soft errors have become one of the most serious reliability problems for both space-used and terrestrial application ICs. Soft errors are usually induced by single event upsets (SEU) and single event transients (SET), and they have multiple error sources which are difficult to distinguish each other. For digital ICs, either SEUs from memories/flip-flops, operation logic SETs, clock tree SETs, set/reset SETs or scan SETs, can cause soft errors, and the hardening methods and their cost is different for each of these error sources. The accurate evaluation of the contribution and behaving way of each error source is a significant base to solve soft errors and reduce hardening overhead. This project will adopt nano-scale digital ICs as research objects, and aim to discover the mechanisms of soft errors induced by different error sources in ICs, build error models, and propose methods to distinguishingly test and separately analyze the error sources, through theoretical and experimental analyses. Thus, this project will acquire the contributing priorities and ways of error sources, propose and verify some individual methods for soft error mitigation, and give some implications to the hardening design of digital ICs for better effectiveness and efficiency.

纳米级集成电路对辐射引起的软错误极为敏感，软错误已成为宇航和地面应用集成电路最严重的可靠性问题之一。软错误由单粒子翻转（SEU）或单粒子瞬态（SET）所引起，其特点是错误来源众多，难以分辨。对于数字集成电路，存储器或触发器的SEU、运算逻辑SET、时钟树SET、置复位SET、扫描信号SET等都可造成软错误，而针对这些不同错误来源的加固方式和加固开销是不同的。准确评估不同错误来源对软错误的贡献程度和贡献方式是解决软错误并减小加固开销的重要基础。项目以纳米级数字集成电路为研究载体，通过理论和实验研究，揭示集成电路中不同错误来源造成软错误的机理，建立软错误成因模型，提出大规模数字集成电路的软错误来源分辨测试、分离分析方法，通过测试结构的辐照试验和理论分析，获取不同错误来源对软错误的贡献程度和贡献方式，形成针对性的软错误加固方法，以期有效提升集成电路软错误加固的效果和效率。

纳米级集成电路对辐射引起的软错误极为敏感，软错误已成为宇航和地面应用集成电路最严重的可靠性问题之一。软错误由单粒子翻转（SEU）或单粒子瞬态（SET）所引起，其特点是错误来源众多，难以分辨。对于数字集成电路，存储器或触发器的SEU、运算逻辑SET、时钟树SET、置复位SET、扫描信号SET等都可造成软错误，而针对这些不同错误来源的加固方式和加固开销是不同的。准确评估不同错误来源对软错误的贡献程度和贡献方式是解决软错误并减小加固开销的重要基础。项目以纳米级数字集成电路为研究载体，通过理论和实验研究，揭示了纳米级集成电路中不同错误来源造成软错误的机理，建立了软错误成因模型，提出大规模数字集成电路的软错误来源分辨测试、分离分析方法，通过测试结构的辐照试验和理论分析，获取了不同错误来源对软错误的贡献程度和贡献方式，形成了针对性的软错误加固方法，可有效提升集成电路软错误加固的效果和效率。