高压SOI-LIGBT器件短路失效机理与模型研究

In recent years, the power rating of the fully integrated single-chip intelligent power ICs is expanding, gradually replacing the traditional intelligent power module (IPM). SOI-LIGBT is the core component in the fully integrated single-chip intelligent power ICs, and its performance directly determines the reliability and power consumption of the chip. The increase of the output current severely deteriorates the short-circuit capability of the high-voltage SOI-LIGBT, which seriously limits the fully integrated single-chip intelligent power ICs to extending to high power ratings. The reported research on high-voltage SOI-LIGBTs has mainly focused on the simple optimizations on dimensions and doping concentrations while few efforts have been made to reveal the short-circuit failure mechanism and modeling. In this project, the short-circuit failure mechanism will be studied in depth and the analytic model will be established, fully revealing the device damage mechanism for various types of short-circuit failure. Then, the method for short-circuit capability optimization will be proposed and a novel SOI-LIGBT with high short-circuit capability will be developed. The results of this project will provide the theoretical guidance for the short-circuit capability improvement of the high-voltage SOI-LIGBT, and pave the way for the fully integrated single-chip intelligent power ICs with high power ratings.

近年来，全集成单片智能功率芯片的功率级别正在不断扩展，逐步取代传统智能功率模块（IPM）。SOI-LIGBT是全集成单片智能功率芯片中的核心器件，其性能直接决定了芯片的可靠性和功耗。在获得更大输出电流的同时，高压SOI-LIGBT器件的短路能力会急剧下降，严重制约了全集成单片智能功率芯片向更高功率级别发展。目前国内外关于高压SOI-LIGBT器件短路能力的研究主要集中在简单的尺寸和浓度优化，缺少专门针对短路失效机理与模型的研究。本课题将对高压SOI-LIGBT器件的短路失效机理开展深入研究，建立短路解析模型，全面揭示各种短路失效类型下的器件损坏机理，提出系统化的短路能力优化方法并研制一款具有高短路能力的新型SOI-LIGBT器件。本课题的研究成果将为高压SOI-LIGBT器件短路能力的提升提供理论指导，并且为全集成单片智能功率芯片向大功率级别扩展打下基础。

目前，高压SOI-LIGBT器件在获得更大输出电流的同时，器件的短路能力会急剧下降，严重制约了全集成单片智能功率芯片向更高功率级别发展。因此，非常有必要对高压SOI-LIGBT器件在短路状态下的失效机理及模型展开全面的深入研究。. 本项目研究了不同短路应力条件下SOI-LIGBT器件的短路失效机理，并建立了能够真实反映高压SOI-LIGBT器件短路过程的解析模型，研究并揭示了器件各参数对器件短路能力影响的内在关系。根据提出的短路过程解析模型和短路失效机理，本项目分别从器件尺寸参数、工艺与版图等方面对SOI-LIGBT器件的短路能力进行了优化。 .分别提出了沟槽栅控制技术、双栅控制技术、四栅控制技术、分段沟槽控制技术、复合集电极工艺技术、多跑道器件深沟槽隔离工艺技术等优化方法。上述优化方法的提出，有效提升了SOI-LIGBT器件的短路能力，为高短路能力SOI-LIGBT器件的设计提供了系统的理论基础。. 在此基础上，研制出了一款高短路能力的SOI-LIGBT器件。与传统的SOI-LIGBT相比，研制的SOI-LIGBT器件的饱和电流降低了49.5%，短路耐受时间增加了406%。相关研究成果将为高压SOI-LIGBT器件短路能力的提升提供理论指导，并且为全集成单片智能功率芯片向高功率级别扩展打下基础。也为国产高短路能力SOI-LIGBT器件产品的升级提供了理论技术支持。