面向深度学习的高能效FPGA计算架构及映射方法研究

Artificial neural network computing chips include FPGA, CPU and ASIC. It is difficult for CPU to meet processing speed and power dissipation requirements in realizing complex deep neural networks. ASIC has fixed functions and only suits some specific computational applications. However, FPGA can implement all different neural network algorithms by reconfiguration of the hardware circuit structure, yet constrained in performance by the existing redundancy. There are two fundamental problems needed to be resolved in FPGA applications to the deep neural network: (1) The conventional FPGA architecture is logic operation oriented through embedding heterogeneous multiplier cores, to meet fast digital signal processing tasks. For an ultra large volume of convolution operations and multiple layer processing characteristics associated with a given deep neural network, we shall explore how to design highly energy efficient computational circuit structure on FPGA. (2) For targeting the high energy efficient design, we shall find out how to optimally realize algorithm synthesis and physical mapping of FPGA employed to implement the deep neural network. This project aims to study systematically optimal design theory and methodology for deep neural network FPGA. By parametrical modeling and analysis of the computation architecture, the deep neural network can be adapted to different FPGA devices. Hence a highly energy efficient programmable deep neural network processor can be achieved.

人工神经网络计算芯片包括现场可编程门阵列（FPGA）、通用处理器（CPU）和专用处理器（ASIC）等。CPU在实现复杂深度神经网络时难以达到处理速度和功耗的要求；ASIC功能固化，只针对特定计算应用；FPGA通过配置改变硬件电路结构可实现不同神经网络应用，却存在冗余导致的性能瓶颈。FPGA应用于深度神经网络面临的二个主要基本问题需要突破：（1）传统FPGA结构以逻辑运算为导向，通过嵌入异质乘法器专用核，满足快速数字信号处理的要求。针对特定深度神经网络的海量单位卷积运算以及多层处理等特点，如何在FPGA上设计具有高能效特性的计算电路结构。（2）如何围绕高能效的设计目标，解决深度神经网络在FPGA上进行算法综合和物理映射的优化实现。本课题将研究深度神经网络的FPGA 系统性优化设计理论和方法，通过计算架构的参数化建模和分析，能够适配不同FPGA芯片结构，实现高能效可编程深度神经网络处理器。

人工神经网络计算芯片包括现场可编程门阵列(FPGA)、通用处理器(CPU)和专用处理器(ASIC)等。CPU在实现复杂深度神经网络时难以达到处理速度和功耗的要求；ASIC功能固化，只针对特定计算应用；FPGA通过配置改变硬件电路结构可实现不同神经网络应用，却存在冗余导致的性能瓶颈。本课题研究了FPGA应用于深度神经网络面临的二个主要基本问题：(1)传统FPGA结构以逻辑运算为导向，通过嵌入异质乘法器专用核，满足快速数字信号处理的要求。针对特定深度神经网络的海量单位卷积运算以及多层处理等特点，如何在FPGA上设计具有高能效特性的计算电路结构。(2)如何围绕高能效的设计目标， 解决深度神经网络在FPGA上进行算法综合和物理映射的优化实现。本课题探讨了深度神经网络的FPGA系统性优化设计理论和方法，通过计算架构的参数化建模和分析，能够适配不同FPGA芯片结构，设计实现了多种高能效可编程深度神经网络处理器。