基于TSV互连的三维FPGA架构及关键技术研究

As FPGA chips grow in complexity, the problems such as interconnect delay, clock synchronization and IR drop in power grid have become more severe than ever. Among emerging technologies, three dimentional integration based on through silicon vias (TSV) is the most promising candidate to solve such problems. Taking into consideration the four existing 3-D FPGA architectures and the availability of TSV structures as interconnects, this project chooses general asymmetric structures as the basic building block for 3-D FPGAs based on TSV interconnects, and explores the architecture in terms of thermal stability, system stability and optimization methodology. We will work on the strategy for seeking an algorithm of the distribution of resources among the layers to achieve lowest possible power consumption, and find the solution for the thermal stability of 3-D FPGAs. Meanwhile, we will explore the recovery mechanism for TSV interconnect defects which are induced in the manufacture process or caused by thermal stress effects. Based on the aforementioned works, we will propose an optimized design methodology of TSV-based 3-D FPGAs. Furthermore, we will study the key technologies for building 3-D FPGAs with TSV interconnects: establishing delay and power consumption models for TSV structures, modelling TSV manufacture defets and evaluating the crosstalks introduced by TSV arrays. This project closely builds the foundations for bringing TSV-based 3-D FPGAs into practical use, and it will prove to be a cutting-edge exploration with profound significance.

随着FPGA集成规模不断发展，传统二维芯片结构导致的长互连延时、时钟同步困难以及电源网络的电压降（IR Drop）等诸多问题逐渐凸现。基于TSV互连的三维集成技术，是最有潜力且现实可行的下一代吉规模FPGA的解决方案。在综合分析已报道的四种三维FPGA架构的性能优劣与应用TSV互连的可行性后，本项目将着重研究以功耗为优化目标的分层及资源分配策略，解决由散热不均匀引起的三维FPGA的热稳定性问题；研究TSV互连的冗余修复电路，解决由制造缺陷或热应力效应引起的三维FPGA的可靠性问题；研究三维FPGA结构参数与芯片性能之间的各种约束关系，提出架构优化的评估与设计方法。此外，作为三维FPGA架构研究的基础，探索三维FPGA中垂直互连TSV的制造缺陷机理分析及建模方法，构建三维FPGA垂直互连TSV的延时和功耗模型，为三维FPGA的研制奠定理论基础。

作为超越摩尔定律时代的重要解决方案，基于TSV互连的三维集成技术，是最优潜力且现实可行的下一代吉规模FPGA解决方案。本项目从研究TSV电学模型，三维集成FPGA架构设计技术，三维FPGA热分析方法,三维FPGA架构评估方法，三维FPGA测试技术着手，完成的研究内容和取得的主要研究成果如下。. 主要研究内容和研究成果：1、对TSV的宽频电学模型进行研究，构建FPGA垂直互连TSV模型，利用场分析方法对传统SU-8型和采用新型低K技术的Air-gap型同轴TSV建模。研究结果显示：与双线型圆柱TSV相比，同轴结构的单位面积带宽高出一个数量级。而采用低K的Air-gap技术可将传统SU-8型同轴TSV的单位面积带宽提升约2.5倍。2、对基于TSV的三维FPGA热分析方法进行研究，旨在解决由散热不均匀引起的三维FPGA热稳定性问题。3、对三维FPGA架构评估方法进行研究，分别从基于CAD的实验角度和基于机器学习算法的解析建模角度对三维FPGA架构结构参数和芯片性能之间的各种约束关系进行研究。4、作为进行三维FPGA架构研究的基础，对新型可编程逻辑单元、可编程互连结构、可编程异质模块、时钟网络设计技术进行研究，拓展了三维FPGA的架构设计空间。5、对三维FPGA分层及资源分配策略进行研究。6、FPGA内建自测试技术。随着FPGA扩展到三维，FPGA内部参数的测试变得更加困难，可测性变得越来越低。为此，课题组在FPGA参数的内建自测量方面展开研究，试图以内建的方式解决FPGA参数的可测性问题，提高可测性的同时，促进FPGA的升级换代。. 项目研究成果在ICCAD、FPT、FPL、CICC、Electronic letters等国际/国内会议/期刊发表学术论文30篇，其中SCI检索7篇，EI检索20篇