多电源-多负载PDN电源完整性建模分析及协同设计研究

With the clock frequency up to gigahertz in high speed digital systems, the power supply noise on the power distribution network (PDN) and its ramification such as the timing jitter, electromagnetic radiation and signal error bit are becoming more and more serious, which has become the main bottleneck in the development of high-speed circuits. The present PDN design methodology based on the PDN lumped model and the frequency domain target impedance which is most widely adopted in the industry appears inaccurate in the high-frequency domain, so it is difficult to achieve the requirements of voltage noise by using reasonable package and decoupling resources. Lumped model has been unable to characterize the high frequency distribution characteristics of PDN and the interference of power noise among loads. To solve these problems, the physical and circuit simulation model of complex multi-layer power distribution network is first constructed to reveal the coupling mechanism between multi-layer PDN networks, and then the mathematical model is obtained to provide the algorithm basis for decoupling design. Then, an innovative quantitative index of decoupling capacitance’s efficiency is proposed based on the actual impedance distribution of PDN, which is used to guide the co-decoupling design of multi-load PDN to suppress power supply noise.Based on the coupling theory between signal vias and power/ground plane, the co-design method of signal vias and power/ground plane is studied. This project can effectively improve the efficiency PDN’s distributed modeling and co-decoupling design, and shorten the design cycle of high-speed systems.

随着高速数字系统中时钟主频高达数吉赫兹，电源分配网络(PDN)上的电源噪声及派生的时序抖动、电磁辐射和信号误码日益严重，已成为高速电路发展的主要瓶颈。目前业界惯用的基于PDN集总模型频域目标阻抗的电源噪声抑制准则在高频段已呈现瓶颈，导致采用合理的封装和去耦资源难以满足系统对噪声的要求。集总模型已无法表征PDN的高频分布特性及各负载间的噪声干扰。针对这些问题，本项目首先构建复杂多层电源分配网络的物理和电路仿真模型，揭示多层PDN网络间的耦合机制，进而得到数学模型为去耦设计提供算法基础。然后，创新性的提出由PDN实际阻抗分布计算去耦电容去耦效率量化指标，用于指导多负载PDN的协同去耦设计，抑制电源噪声。最后，基于信号过孔与电源地平面间耦合理论，提出信号过孔与电源地平面的协同建模与设计方法。本项目研究成果能有效提高PDN分布式建模和协同去耦设计效率，缩短设计周期，具有重要的理论意义和应用价值。

随着高速数字系统中时钟主频高达数吉赫兹，电源分配网络(PDN)上的电源噪声及派生的时序抖动、电磁辐射和信号误码日益严重，已成为高速电路发展的主要瓶颈。目前业界惯用的基于PDN集总模型频域目标阻抗的电源噪声抑制准则在高频段已呈现瓶颈，导致采用合理的封装和去耦资源难以满足系统对噪声的要求。集总模型已无法表征PDN的高频分布特性及各负载间的噪声干扰。针对这些问题，本项目首先构建复杂多层电源分配网络的物理和电路仿真模型，揭示多层PDN网络间的耦合机制，进而得到数学模型为去耦设计提供算法基础。然后，创新性的提出由PDN实际阻抗分布计算去耦电容去耦效率量化指标，用于指导多负载PDN的协同去耦设计，抑制电源噪声。最后，基于信号过孔与电源地平面间耦合理论，提出信号过孔与电源地平面的协同建模与设计方法，并扩展研究了非线性因素对高速信号的影响及建模方法。.针对去耦电容去耦效率量问题，通过将牛顿优化算法和谐振腔算法相结合，可精确快速的计算去耦电容在确定频率下的有效去耦区域，为去耦电容的放置位置提供参考依据。针对多负载PDN的协同去耦设计，通过将牛顿优化算法和传统的去耦优化设计方法相结合，可快速得到最优去耦设计方案，通过与专业仿真软件ANSYS SIwave相对比，发现所提算法存在明显的速度优势和方案优势。针对基于信号过孔与电源地平面间耦合问题，基于谐振腔模型提出了信号过孔与电源地平面的协同建模方法。.本项目研究成果能有效提高PDN分布式建模和协同去耦设计效率，缩短设计周期，具有重要的理论意义和应用价值。