三维连续集成集成电路关键工艺技术和机理研究

Dimensional scaling of CMOS is perceived to slow down and possibly end sometime around 2020-2030 or at minimum around 5 nm technology node. In this project we will take advantage of the third dimension (3D) by employing monolithic 3D sequential integration technology to address the grand challenge of enabling increased device density when the device itself does not scale and hence further prolong the lifetime of the Moore's law. Novel process technologies such as dopant activation and reparation of lattice damage at ultra-low temperature by microwave annealing as well as conformal metal formation by innovative HiPIMS technique are the research focus of this project. Micro-level mechanisms as well macro-level modeling of the microwave annealing and HiPIMS process will be thoroughly studied. Development of the combo of the innovative ultra-low temperature doptant activation by microwave annealing and formation of high-conformality metal silicides in high aspect ratio contact holes by HiPIMS is supposed to provide theoretical and technological breakthroughs in advancing 3D sequential integration technology into a mature level.

由于迟早会碰到物理规则或制造成本的限制，集成电路可能在7-8纳米技术代或最小到5纳米技术代时将会停止前进。三维连续集成技术由于能在单片上进行两层及以上高密度、高沟道迁移率的器件集成，因此有望在单个器件尺寸不能继续缩小时还能继续延续摩尔定律的有效性。本项目研究适用于三维连续集成的新型超低温微波退火杂质激活和晶格缺陷修复技术以及创新的高一致性HiPIMS薄膜形成技术，深入探索微波退火加热半导体结构的微观机理以及HiPIMS技术工艺原理，建立完善的工艺仿真模型，开发创新的超低温微波退火杂质激活技术和HiPIMS高深宽比接触孔内金属硅化物形成工艺相结合的工艺模块，为攻克三维连续集成面临的关键技术障碍取得核心的理论和技术突破。

由于迟早会碰到物理规则或制造成本的限制，集成电路可能在7-8 纳米技术代或最小到5 纳米技术代时将会停止前进。三维连续集成技术由于能在单片上进行两层及以上高密度、高沟道迁移率的器件集成，因此有望在单个器件尺寸不能继续缩小时还能继续延续摩尔定律的有效性。本项目研究适用于三维连续集成的新型超低温微波退火杂质激活和晶格缺陷修复技术以及创新的高一致性三维金属硅化物HiPIMS薄膜形成技术，深入探索微波退火加热半导体结构的微观机理以及三维金属硅化 技术工艺原理，建立完善的工艺仿真模型，开发创新的超低温微波退火杂质激活技术和三维金属硅化物高深宽比形成工艺相结合的工艺模块，为攻克三维连续集成面临的关键技术障碍取得核心的理论和技术突破。