高速高精度电荷式流水线ADC的转换误差校准方法研究

The charge-domain pipelined analog-to-digital converter (ADC) based on bucket brigade devices (BBD) is a novel opamp-less A/D conversion technique, which opens a new way to implement low-power pipelined ADCs. However, because of the conversion errors caused by the nonlinearity in the charge transfer characteristics of BBDs and the mismatches in the capacitors of each sub-stage, the precision of charge-domain ADC is difficult to meet the requirements of next-generation broadband communication and radar systems. Based on the research results from a previous project for common-mode charge error calibration in charge-domain ADCs, which is supported by the the National Natural Science Foundation of China, this project will go a step further to research the calibration methods of conversion errors in charge-domain pipelined ADCs. Based on mathematical modeling of the nonlinearity of BBDs, this project will explore a feedforward predistortion method and a digital compensation method, respectively, to calibrate the conversion errors caused by the BBD nonlinearities. For the conversion errors caused by the mismatches of the capacitors in each sub-stage, this project will adopt a mixed-signal calibration method based on binary search and a pure digital calibration method, respectively. Based on the evaluation and comparison of effectiveness, convergence speed, and consumption of power and chip area for each method, this project will research and determine the overall calibration method and circuit topology that combines the calibration methods for the two kinds of conversion error sources. Theoretical analysis and derivation for each calibration method have been implemented preliminarily, and research productions are expected to achieve international standards in the doamin of ADC design research in the end of this project.

基于斗链式器件（BBD）的电荷式流水线模数转换器（ADC）是一种新型的无运放A/D转换技术，开辟了低功耗流水线ADC实现的新途径。然而，这种新型ADC的转换精度受到栅自举BBD电荷传输非线性和各子级电容失配所引起转换误差的限制，难以满足新一代宽带通信和雷达等系统的需求。本项目在国家自然科学基金青年基金对电荷式流水线ADC共模电荷误差校准的研究基础上，进一步深入研究电荷式流水线ADC转换误差的校准方法。在对BBD非线性数学建模的基础上，拟分别采用前馈预失真法和数字补偿法校准BBD非线性引起的转换误差；针对各子级电容失配引起的转换误差，拟分别探索基于二分搜索的数模混合校准和纯数字校准方法。在对比各种方法有效性、收敛性和电路开销的基础上，研究确定两类误差校准相结合的总体误差校准方法和电路结构。各种方法的理论分析和推导已初步完成，项目结束时预期在电荷式流水线ADC的转换误差校准方面达到国际水平。

本项目对斗链式电荷传输器件（BBD）的非线性以及电荷式流水线模数转换器（ADC）中数模转换器（DAC）的差模电荷误差的产生机制和变化规律进行了深入的理论分析。在此基础上，对电荷式流水线ADC中的转换误差校准方法开展了深入的研究。ADC中各子级DAC的电容失配将造成级内权电荷失配或相邻两级的权电荷比例失配，而各级的权电荷等于单元电容与基准电压之积，因此本项目通过调整基准电压来补偿电容失配。基于这一思路，本项目用一种基于二分搜索的误差校准方法来校准电容失配引起的差模电荷误差。BBD电荷传输的非线性用前馈预失真的方法来校准。两种校准电路通过DAC电压相加的形式进行合并。整个校准算法基于一个嵌入式的微处理器来执行。在本项目研究成果的基础上，项目组及协作单位设计了一款250MSPS、16位的电荷式流水线ADC芯片，并完成了流片测试，功耗仅为500mW。在BBD电荷传输单元的基础上，本项目还提出了一种利用BBD进行余量传输的流水线逐次逼近（pipelined-SAR）ADC，可以进一步提高pipelined SAR ADC的功率效率。在基金的支持下，项目组还研究了超低功耗带隙基准和低压低功耗SAR ADC，取得的成果可在物联网和植入式医疗电子等领域得到应用。. 本项目的部分研究成果已经在IEEE Transactions on Very Large Scale Integration (VLSI) Systems、 IEEE Transactions on Circuits and Systems II: Express Briefs和IEEE Transactions on Very Large Scale Integration (VLSI) Systems、ASSCC、ISCAS、ESSCIRC等顶级期刊和会议上发表论文21 篇，获得国家发明专利授权3项，参与著作一本。通过本项目的研究，先后培养了硕士毕业生6人，博士毕业生1人。