低功耗数字化高集成度无线通信SoC芯片关键技术研究

Wireless transceivers are widely applied and their cost, power and performance are the main concerns in large scale applications. The proposal aims at the needs of low power consumption, high integration, and low cost for wireless communication SoC, and breaks through the current problems and bottlenecks that the circuit consumes a great amout of power,and it is difficult to integrate high accuracy oscillator, and the process compatibility is poor. The proposal adopts a innovative multi-level calibration scheme to implement high accuracy and all digital CMOS integrated oscillator,utilizes a novel digital assisted method to degrade the transmitter's power, proposes dynamic sampling technology to lower the receiver's power. A in-depth scientific research is deployed about the multi-stage cascaded calibration scheme, the branch mismatch detection and pre-calibration scheme of digital assisted transmitter, and the dynamic sampling and the compensation of the nonideal factors. The proposal presents a digitalized, high integrated and low power system architecture, its implementation method, and relative models for wireless communication SoC, reveals how the modulation, the detection and compensation algorithms for various nonideal factors, and circuit implementation method affect the power, integration and performance of the SoC. Furthermore, the study will provide a fundamental for further study and broad applications.

无线收发机应用极为广泛，在系统开发时，其成本、功耗、性能是批量应用时的主要考虑因素。本课题面向无线通信SoC 芯片对低功耗、集成度、低成本的需求，突破目前无线通信SoC 中的电路功耗大、振荡器较难集成、工艺兼容性差的难题与瓶颈，创新性地利用多级校准技术实现低功耗高精度全数字的CMOS集成时钟振荡器，利用新颖的数字辅助方法降低发射机功耗，基于动态采样技术来降低接收机功耗；针对数字化振荡单元的多级校准机制、数字辅助发射机中的支路失配检测与预补偿技术、接收机中的动态采样与非理想因素补偿技术展开深入的科学研究，提出数字化、高集成度、低功耗的无线通信SoC 系统架构、实现方式及相关模型，揭示通信体制、各种非理想因素检测及补偿算法、电路实现方式对SoC 功耗、集成度、性能的影响规律，为相关技术的进一步深入研究与广泛应用提供思路。

本课题研究低功耗、数字化、高集成度的面向OFDM 技术的无线通信SoC芯片发射机关键技术及架构。本项目属于微电子与通信系统的交叉应用领域，是对低功耗、高性能、高灵活度的无线通信标准应用的基础性与预研性工作。主要研究内容包括数字振荡器、ADPLL、相位调制器及数字发射机架构。基于研究内容，完成克服PVT的数字时钟产生器，实现低功耗、高精度数字综合器，提出低功耗、高性能相位调制器，并以上述模块为基础，完成高性能、高灵活、低功耗的数字发射机设计。所实现的模块及架构，测试性能均可达到国际先进水平，对满足未来通信高能效、高灵活、高吞吐率的要求具有重要意义。