As the semiconductor technology scales to sub-22 nm node, the conventional Si-based Floating gate memory will encounter a series of technical problems and theoretical limitation. Three-dimensional (3D) storage technology is considered to be the most effective method to satisfy the future requirement of ultra-large capacity data storage. Resistive random access memory (RRAM) device has received extensive attention and considered as one of the most promising candidates for future ultra-high density storage application due to its simple structure, low power, high speed, good scalability, excellent compatibility with CMOS technology, and ease to 3D integration. For the key RRAM 3D integration technology, this project will focus on the investigation of bipolar RRAM device with high stability, bidirectional selector with large current density, high nonlinear factor and high reliability, integration technology between bidirectional selector and bipolar RRAM. On this basis, develop the device integration and characterization technologies to realize the 1S1R structure with excellent uniformity, high stability and reliability, solve the integration issue and reliability issue on the high-density crossbar array. The successful implementation of this project will provide important guidelines for the realization of the high-density storage of bipolar RRAM and also can promote the development of the memory technology in our country.
随着半导体制造技术进入22nm工艺节点,传统硅基浮栅存储技术将面临一系列技术难题和理论极限。三维集成存储技术被认为是未来实现超大容量数据存储的关键途径。高速、低功耗、非挥发性的阻变存储器由于其结构简单、易于三维集成而引起了广泛关注。本项目针对性能更加优越的双极性阻变存储器集成技术,结合目前该领域的研究现状和已有的研究基础,拟重点开展高性能双向选通管与双极性阻变存储器的集成技术研究。从器件的材料、结构、制备、物理机制等方面出发,研制出高稳定性的双极性阻变存储器件,高电流密度、高非线性系数、高可靠性的双向选通管器件。开发双向选通管与双极性阻变存储器件的集成工艺,优选出均匀性、稳定性和可靠性俱佳的1S1R结构,解决基于1S1R结构高密度存储交叉阵列中的阵列集成与阵列可靠性问题。为RRAM实现高密度存储奠定基础,从而推动我国存储器技术的发展。
新型阻变存储器由于其结构简单、性能优越、易于三维集成、与CMOS工艺兼容,被认为是未来高密度存储技术的有力候选者之一。本项目针对性能更加优越的双极性阻变存储器集成技术,重点开展了双极性阻变存储器件性能优化与高性能选通管的研究。从器件的材料、结构、物理机制等方面出发,通过构造不同结构的器件单元,揭示了决定双极性阻变存储特性的主要界面层位置,揭示了不同活性电极材料引起器件性能变化的本征物理机制。针对不同结构、不同阻变参数对阻变存储器交叉阵列存储密度大小的影响开展研究,阐明了影响阻变存储交叉阵列存储密度大小的主要因素。通过设计合适的双层结构器件,获得了一致性、稳定性俱佳的高性能选通管器件单元,通过构造平面结构器件,阐明了双层结构器件中单向自整流选择特性的本征物理机制。本项目的实施为双极性阻变存储器实现高密度集成积累了实验数据并奠定了基础。
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数据更新时间:2023-05-31
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