多核系统中基于新型存储器工艺的高能效缓存设计研究

As potential replacements of the traditional SRAM technology, various emerging memory technologies, such as MRAM and PCM, have been attracting more and more attention and been extensively researched. These memory technologies have common advantages of high density, low static power consumption, etc. Prior research has shown that the cache hierarchy based on these memory technologies can help improve performance and reduce power consumption of a multi-core system. The caches based on these emerging memory technologies, however, have a common issue of "asymmetric-access", in respect of performance, power, and reliability. Moreover, it becomes more significant under the effect of process variations. This issue has become the main obstacle of adopting these technologies in the future cache hierarchy. This proposal will explore the energy-efficient cache hierarchy design using these emerging memory technologies in multi-core systems. The proposal includes following research topics: (1) building cell level and circuit level models of these emerging memory technologies with the consideration of process variations; (2) based on these models, developing a circuit level simulator, which can optimize cache designs for different system design specifications; (3) proposing novel asymmetric-access-aware techniques to improve the cache architectures and management policies. The research in this proposal can help the cache designer to choose a proper memory technology and quickly find optimized cache design variables for different design specifications of multi-core systems. In addition, the architectural level techniques proposed in this work can further improve performance and reduce power of the cache hierarchy.

新型存储器工艺（如MRAM和PCM等）作为SRAM的替代工艺受到越来越多的关注和研究。这些存储工艺具单位面积存储密度高，静态功耗低等优点。在多核系统的缓存体系中使用这些存储工艺，有助于提高系统性能并降低功耗。然而，对基于新型工艺缓存的访问操作在性能和功耗等方面存在"非对称性"，并且在工艺扰动的影响下显得更加突出。这一特性已成为采用这些新存储工艺的一个主要障碍。本课题研究如何在多核系统中，利用这些新型存储工艺设计高能效的缓存。主要研究内容包括：（1）考虑工艺扰动的影响对新型存储工艺在器件和电路级建模；（2）基于模型开发能够根据不同系统规格要求优化缓存电路设计的仿真器（3）针对新型工艺缓存的非对称性提出结构改进和管理策略的优化。通过以上研究，本项目可以帮助缓存设计者根据多核系统的设计规格快速的选择合适的存储工艺和设计参数，同时利用结构级优化技术进一步提高缓存的性能并降低功耗。

近年来，新型存储器工艺(如MRAM、PCM等)作为SRAM的替代工艺受到越来越多的关注和研究。新型存储工艺具单位面积存储密度高,静态功耗低等优点。在多核系统的缓存体系中使用这些存储工艺,有助于提高系统性能并降低功耗。然而,基于新型存储工艺缓存的访问操作在性能和功耗等方面存在"非对称性"的特点,工艺扰动使其更加突出。相比传统存储，使用新型存储工艺的缓存可靠性和寿命问题较为显著。这些特性已成为采用这些新型存储工艺的主要障碍。.本课题研究了如何在多核系统中,利用这些新型存储工艺设计高能效高可靠的缓存。本课题在新型存储工艺在器件和电路级模型的基础上，涵盖了(1)低功耗非易失缓存的构建与寿命优化，(2) 新型存储工艺缓存的高性能数据读写技术，(3) 新型存储工艺缓存高可靠性技术等多个方面。通过寿命优化，能够提高基于新型存储工艺的缓存寿命；通过读写技术，缓存延迟减少约4%，功耗减少约20%；通过高可靠性技术，系统稳定性得到显著提升。.通过上述研究,本课题帮助缓存设计者根据多核系统的设计规格快速的选择合适的存储工艺和设计参数,同时利用结构级优化技术，进一步提高缓存性能、提高缓存可靠性、降低缓存功耗。