宽带电力线通信模拟前端处理芯片关键技术研究

For large-capacity high-speed data transmission applications, the development of wireless communication technology subject to a variety of restrictions, the wired communication system is the best choice. Power line communication is a kind of wired communication technology which adopts power line as communication medium. The power line has many characteristics such as high voltage, large current, large noise and many types of loads. The signal of the carrier is usually an analog signal. To transmit signals on the power line will face the challenge of noise immunity and stability. Efficient data communication not only requires proper power line monitoring and management, but also high-speed processing of analog signal reception, transmission and conversion, so high-performance analog front end (AFE) is particularly important. Based on nano-scale CMOS technology, the project will systematically study the reconfigurable power line communication analog front-end technology, breaking through the key technologies of high dynamic range receiver, output load impedance matching, adaptive reconfigurable data conversion and reconfigurable control circuit, which can solve the problems of low noise gigabit data transmission analog signal processing problems. The implementation of multi-mode reconfigurable high-speed analog front-end processing chip, will effectively solve the power line wired communication analog front-end reliable communication, efficient data transceiver issues, which has very important theoretical significance and application value.

对于大容量高速数据传输应用，无线通信技术的发展受到多种限制，有线通信系统是目前的最优选择。电力线通信是一种采用电力线作为通讯介质的有线通信技术，电力线路具有电压高、电流大、噪声大、负载种类多等诸多特点，其载波的信号通常为模拟信号，利用电力线传输信号面临抗干扰性和稳定性的挑战。高效的数据通信不仅需要合适的电力线监控与管理，还需要高速的处理模拟信号接收、发送与转换，因此高性能模拟前端（AFE）显得尤为重要。本项目基于纳米级CMOS工艺，系统研究可重构电力线通信模拟前端技术，突破高动态范围接收端、输出负载阻抗匹配、自适应可重构数据转换、可重构电路控制等关键技术，解决低噪声千兆比特数据传输模拟信号处理科学问题，实现多模可重构高速模拟前端处理芯片，将有效的解决电力线有线通信模拟前端的可靠通信、高效数据收发等问题，具有十分重要的理论意义和应用价值。

电力线通信是一种采用电力线作为通讯介质的有线通信技术，利用电力线传输信号面临抗干扰性和稳定性的挑战。本项目针对电力线通信协议标准HomePlugAV2，设计了一款电力线可重构模拟前端，接收通道包括衰减-可编程增益放大器、低噪声放大器、低通滤波器和可编程增益放大器等电路模块；发送通道包括低通滤波器、可编程增益放大器、具有可编程输出阻抗的线驱动器等；提出了一种电容拆分复用及通道时域交织一体化技术，实现了量化精度和有效信号带宽的同步重构，完成了一款10-12位80-20MS/s精度带宽同步可重构SAR ADC；完成了一款基于可重构电容阵列及一步两位一体化技术的8-9位120-60 MS/s可重构SAR ADC设计，本项目研究成果对电力线有线通信模拟前端的可靠通信、高效数据收发等方面具有良好的指导意义。