基于薄片电极并列放电的第三代半导体晶圆高效精密电火花多片切割新方法研究

The third-generation semiconductor has entered a period of explosive growth, and the demand for wafers as the key core material is constantly rising. Their hardness, however, is several times higher than that of silicon semiconductor, which makes them very difficult to machine. The traditional sawing method for wafer fabrication is not only inefficient and of high cost, but also causes a large kerf loss. Multi-wire electrical discharge machining (EDM) is a very potential wafer slicing method as it has no limitation of material hardness. However, the risk of wire breakage is high in this method, and using thinner wire requires decrease of discharge current and wire tension when processing, which leads to reduction of processing speed and accuracy. In this project, a new parallel-discharge EDM method based on thin-foil electrodes, which can take both large current and tension, is proposed, with the aim to realize high-efficiency and high-precision slicing of the high hardness third-generation semiconductor wafers. The principle of thin-foil EDM slicing and the method of multi-foil simultaneous slicing are systematically studied, and the mechanism and control method of multi-foil parallel-discharge machining based on electrostatic induction is revealed. The fundamental experiments of slicing wafers by multi-foil parallel-discharge method are completed, and the optimization scheme of process parameters is put forward. The study provides both theoretical and technical basis for high-efficiency and high-precision fabrication of the high hardness third-generation semiconductor wafers, and the research results will promote not only the application and popularization of the third-generation semiconductor materials, but also the development of EDM technology.

第三代半导体已进入爆发式增长期，对作为关键核心材料的晶圆需求不断高涨，但其硬度高于硅半导体数倍，使用传统的锯切晶圆制造方法不仅加工困难、加工效率低，而且切缝损失大且成本很高；多线电火花线切割不受材料硬度限制，是一种很有潜力的晶圆加工方法，但是其断线风险高，且细线化需要以减小放电电流和线张力为代价，进而导致加工速度和精度的降低。本项目以第三代半导体晶圆的高效精密加工为目标，提出基于可以同时施加大电流和大张力的薄片电极的电火花切割加工新方法，系统研究薄片电极电火花切割加工的原理和多薄片同时切割加工的工艺方法，揭示基于静电感应的多薄片并列放电加工机理和控制方法，完成多薄片并列放电切割晶圆的基础实验，并提出过程参数的优化方案，从而为实现高硬度第三代半导体晶圆的高效率高精度切割加工提供理论依据并奠定技术基础。本项目的研究成果将促进第三代半导体材料的应用普及，同时推动电火花加工技术的发展。

第三代半导体材料普遍具有硬度高、脆性强、化学性质稳定等特点，导致传统的晶圆机械加工方法难以适用于第三代半导体晶圆的制造。电火花加工方法依靠放电等离子体对材料进行非接触去除，是一种有潜力的第三代半导体晶圆制造技术。本项目以第三代半导体晶圆的高效精密加工为目标，以单晶SiC作为对象开展了系统的基础研究与工艺开发工作。具体内容包括：1）通过单脉冲放电实验解析不同能量密度的脉冲放电波形对单发放电凹坑的形貌和尺寸影响，基于传热学和放电等离子体理论建立放电过程的有限元仿真模型，分析工件内部温度场的经时演变，为不同加工需求下的工艺参数选择提供了理论依据；2）研究了SiC的体阻抗及其与金属夹具接触界面上形成的肖特基势垒对极间放电电压的影响，并探究其高放电维持电压对放电状态检测、脉冲能量控制与伺服进给稳定性的影响；3）探明了SiC表面产生脆性破裂痕迹的原因，提出了抑制SiC放电脆性断裂的工艺参数窗口，以提高晶圆放电加工的表面完整性；4）研究了SiC放电亚表面损伤层的形成和抑制方法，解析了亚表面的材料相变和损伤类型，及其对后续晶圆加工工序的影响；5）探究了放电所能加工的最小晶圆厚度，实现了厚度30 μm的晶圆加工； 6）研究了基于静电诱导放电原理的多线并列放电切割方法，研制基于薄片电极的晶圆切片加工试验系统，分析了放电等效电路模型及工艺方法，验证了并列放电切片的可行性和有效性；7）拓展研究了基于静电诱导放电原理的半导体晶圆减薄方法，通过对静电诱导放电回路建立理论数值模型，分析讨论了极间大电容、半导体内部与界面的阻抗特性对放电加工的影响规律及机理，验证了双极性放电互磨方法的有效性。本项目丰富和完善了半导体晶圆高效和精密加工的理论和工艺方法体系，可为典型难加工的第三代半导体材料提供新的制造方法选择。