非精确算术运算单元设计理论与方法

Low power has become a key requirement of current digital integrated circuit design. By allowing errors occurring in computation, inexact circuits can significantly reduce the power of digital integrated circuits. The area and delay can also be greatly reduced at the same time. Therefore, inexact circuit design has become a very attractive research direction in the area of low power design. As the core part of digital processor, the performance and power consumption of the arithmetic unit largely determines the performance and power consumption of the whole processor. However, how to properly design inexact arithmetic units has not been fully studied. In this research, the arithmetic circuits are investigated in terms of inexact computing. The mainstream chip design flow will be applied in the inexact designs by fully using current EDA tools. By applying logic reduction, new algorithms and structures of both fixed-point and floating-point adders, multipliers and dividers will be proposed and they will be applied to error-tolerant computing systems including audio, image and video applications. By taking into account appropriate and reasonable metrics, optimized inexact arithmetic circuits will be fairly evaluated. This research will lay the theoretical ground for the design of future ultra-low power inexact digital processors.

低功耗设计已经成为数字集成电路设计的关键问题之一，非精确计算通过计算包含错误但是有用的结果来有效地降低芯片的功耗，同时可以减小面积和延时。因此非精确计算电路设计已经成为低功耗设计领域一个极具潜力的研究方向。算术运算单元作为数字处理器的核心部件，其性能和功耗对整个处理器的性能和功耗具有决定性意义。如何合理地设计非精确算术运算单元是一个尚未深入研究的课题。本项目以计算机算术运算单元作为非精确电路设计的出发点，将非精确设计与主流的芯片设计流程结合起来，充分利用现有的EDA工具。通过逻辑精简的方法，重点研究非精确定点和浮点加法器、乘法器和除法器的新算法和新结构，并将它们应用于语音、图像和视频等可容错计算系统中。通过探索合理的评价指标来指导实现优化的非精确算术运算单元，为未来超低功耗的非精确数字处理器设计打下理论基础。

本项目针对目前数字集成电路设计特别是专用计算芯片遇到的功耗瓶颈，从非精确（近似）计算的角度深入研究了非精确（近似）算术运算单元的设计方法。非精确计算通过允许计算发生适当的错误来有效降低芯片的功耗并提高系统性能，具有重要的学术意义和广泛的应用前景。. 本项目重点研究了非精确定点和浮点算术运算单元及其在数字信号处理等领域的应用，提出了一系列高能效的非精确算术运算单元电路以及高性能的精确算术运算电路，为高能效近似计算系统的设计打下了坚实的理论基础。. 本项目取得的研究成果如下：. 发表论文14篇，申请发明专利3项，其中在IEEE Trans. Computers、IEEE Trans. Multi-Scale Computing Systems等高水平期刊上发表论文7篇（其中IEEE会刊6篇）均为第一标注，在IEEE ISCAS、IEEE ARITH、ACM GLSVLSI、NANOARCH、ISVLSI等高水平国际会议上发表论文7篇。培养硕士研究生4名，协助培养博士研究生1名，培养本科生2名。. 发表论文中有两篇IEEE Transactions on Computers分别为2017年12月份IEEE计算机会刊的高亮论文以及2017年7月份IEEE计算机会刊最受欢迎论文，一篇会议论文获得GLSVLSI 2015最佳论文候选。. 项目主持人在项目执行期间，当选IEEE计算机会刊（IEEE Trans. Computers）编委(Associate Editor)及IEEE高级会员（Senior Member）并入选首届江苏省“青年科技人才托举工程”。