微处理器的电磁健壮性建模与评估

The electromagnetic robustness (EMR) of microprocessors is a vital issue of critical equipment and systems for electromagnetic compatibility (EMC), electrotechnology for functional safety (FS) and reliability lifetime.The project aims at the EMR issue of high-speed integrated circuits (IC) on designs and applications, which are focused on the mechanisms, models, simulation, experiment, prediction and designs for EMR of microprocessors.The research methodology of EMC combined with reliability is utilized to analyze the mechanisms of EMC drifts for integrated circuits, to explore the law of electromagnetic immunity degradation and failure for microprocessor, and to set up the chip-level EMR models combining electromagnetic performance with aging effects.The analysis algorithms and EMR equivalent circuit of a typical microprocessor are investigated. Simulation software of EMR is used to analyze the EMC drift quantity, and then the EMR performance of microprocessor is predicted and evaluated. The synergistic experiment combining electromagnetic immunity tests with aging test of reliability creates a chip-level EMR experimental platform to detect the electromagnetic immunity and functional safety threshold for a typical microprocessor.The chip-level defensive software of electromagnetic stress and extreme environments, hardware protection mechanism and the compensatory degradation measures will be explored, which focuses on the EMR reinforcement design for system on programmable chip (SOPC) and other special chips.This project will solve the EMR critical issues of the microprocessors to support critical applications requirement for functional safety and systems reliability, to provide technical support for self-designing high-reliability core microprocessors.

微处理器电磁健壮性攸关装备与系统的电磁兼容、功能安全和可靠寿命。项目针对高速集成电路设计与应用的电磁健壮性问题，开展微处理器电磁健壮性机理、模型、仿真、实验、预测与设计的研究。采用电磁兼容与可靠性结合的方法，分析集成电路电磁兼容漂移机理，揭示微处理器电磁抗扰性退化规律，建立综合电磁性能和老化效应的芯片级健壮性模型；研究电磁健壮性分析算法和典型微处理器电磁健壮性等效电路，运用仿真软件定量分析其电磁兼容漂移指标，预测和评估微处理器电磁健壮性；采用电磁抗扰性测试和可靠性老化试验协同方法，创建芯片级电磁健壮性实验平台，快速检测典型微处理器的电磁抗扰度和功能安全阈值；探索芯片级电磁效应和极端环境防御软件、硬件防护机制和退化补偿措施，针对SOPC等专用芯片进行健壮性加固设计。项目研究解决微处理器的电磁健壮性关键问题，支持关键应用领域的功能安全和系统可靠性，为自主设计高可靠性核心微处理器提供技术支撑。

微处理器是国家微电子技术关键基础领域自控、自主能力的集中体现。作为信息系统的核心单元，微处理器的电磁健壮性问题日益突出，严重影响和制约了集成电路芯片自主研制能力以及系统的电磁兼容、功能安全和可靠寿命。项目围绕核心微处理器电磁健壮性机理、模型、仿真、实验、预测与设计开展工作，主要研究成果包括：（1）提取了影响集成电路电磁健壮性的关联要素与特征。分析了集成电路无源网络的耦合特征参数和内部功能单元的电磁特性，揭示芯片电磁特性的温度效应特征。（2）建立了典型微处理器芯片级电磁效应等效电路与行为分析模型。分析了微处理器芯片级电磁特性与等效功能特征，建立了具有集总和分布参数的典型芯片级等效电路模型，提出了基于泰勒级数和神经网络的芯片行为级电磁敏感度建模方法，联合电路分析与电磁兼容仿真软件分析微处理器电磁效应特性。（3）构建了基于直接干扰注入和热应力协同效应的电磁敏感效应分析系统。建立了直接电磁能量注入耦合干扰微处理器电磁敏感度测试系统，提出了电磁兼容与温度老化的协同分析方法，创建了电磁干扰与温度应力联合作用的芯片级电磁效应测试分析平台，进行了典型微处理器电磁健壮性能分析和评估。（4）提出了基于近场线阵列探头三维扫描的电磁特性测试与分析方法。丰富了微处理器芯片和电路板电磁效应分析评估手段，突破了国外同类单探头系统扫描效率低、平面探头系统三维测试难的技术难题。（5）提出了硬件设计与软件防御相结合的电磁健壮性优化方法。通过电磁特性建模仿真和电磁效应性能测试评估，优化了微处理器片内、片外硬件电路和软件设计，提高了典型微控制器、DSP、FPGA和专用芯片等的电磁兼容健壮性性能。. 微处理器电磁健壮性建模与评估研究成果为集成电路健壮性设计提供技术支持，对于提高核心微处理器自主研制能力与装备的电磁健壮性能具有十分重要的科学意义。.