系统级封装的电磁干扰分析与抑制方法研究

The System-in-Package (SiP) is one of the important roadmaps for the development of IC from the "continuation of Moore's Law" to "More than Moore's Law", and it is also one of the critical technologies for the development of electronic systems both for civil and defense in China. Aimed at the inevitable issues during the exploring of modern electronic products, EMC/EMI problems of SiPs are investigated in this project. According to the theoretical analysis, software simulations and physical testing, EMI problems between chip and chip, chip and device all will be considered thoroughly. Based on advanced computational electromagnetics, the numerical computation models of SiPs will be developed. And the generation mechanism of EMC/EMI problems in SiPs will be analyzed, as well as their conduction and radiation rules. The relationship between EMI problems in SiPs and the system design parameters, such as RLC parasitic parameters of the package, the conductivity of the substrate material, and the electrical properties of plastic materials , will be revealed. In this project, the benchmark models and the test environment will be established, and the testing structures and methods will be also designed and researched. The proposed research work is expected to reveal the nature of EMI problems in SiPs, and provide an effective EMI control algorithn and establish the EMC test environment of SiPs. The research results are of positive significance to enhance the integration capabilities of high performance systems and promote the development of microelectronics science and technology in China.

系统级封装技术被认为是集成电路从"延续摩尔定律"到"超越摩尔定律"方向发展的重要技术途径，是解决我国民用和国防电子技术发展重大需求问题的关键技术之一。本项目针对现代电子技术发展道路上不可避免的电磁兼容/电磁干扰问题，以系统级封装为研究对象，采用理论分析、软件仿真和实物测试相结合的方法，研究系统级封装中芯片与芯片、芯片与元件之间的电磁干扰问题；建立系统级封装EMC计算机仿真模型，分析封装电磁干扰问题的产生机理、传导和辐射规律，分析这些问题与封装结构RLC寄生参数、基板材料导电损耗和塑封材料电学特性等系统设计参数的关系；建立面向系统级封装的EMC测试环境，设计测试结构，研究测试方法。项目预期将揭示系统级封装电磁干扰问题的本质，提出有效抑制系统级封装电磁干扰的方法，建立封装EMC测试环境。项目研究成果对于提升我国封装业高性能系统集成能力，推进我国微电子科学与技术的发展具有积极意义。

如何保证电子设备在复杂电磁环境下正常工作，且不对其它电子设备造成性能降低或破坏性干扰，已成为国内外电子设备厂商和用户关注的重要问题。随着集成电路设计技术和工艺技术的进步，EMC工程师们常常遇到在系统和PCB层面上无法得到有效解决的电磁兼容性问题。因此，近年来许多工程师和研究人员将此问题上溯到IC级的电磁兼容性问题。通过对芯片传导发射水平和辐射发射水平测量，可以度量出该芯片的EMC设计质量，从而保证系统设计源头EMC设计的有效性。.本项目主要开展了集成电路系统级封装的电磁干扰分析与抑制方法研究，建立了芯片-封装-PCB板EMC协同仿真平台，建立了封装模块的电磁辐射与传导测试平台和封装模块抗电磁干扰测试平台，完成了多种不同封装的EMC仿真与优化设计。在项目实践中通过多物理域仿真掌握了封装电磁干扰与同步开关噪声、互连线信号反射以及电源网络谐振等方面的关系，总结归纳了一些抑制电磁干扰的方法。项目研究相关技术已经应用到相关企业实际生产中，有效提高了企业产品的性能。