大阵列高速MAPS的压缩采样读出策略及电路架构研究

Monolithic active pixel sensors (MAPS) are attractive for the radiation detectors in high energy physics experiments, space exploration, biology medical imaging and so on, due to high integrated density, high resolution, low material budget, potentially high radiation tolerance and low noise with room temperature. In traditional readout architectures of MAPS based on Shannon Sampling, the signals in the whole pixel array are sampled and quantized firstly, and then are compressed for output. The readout speed is decreased for large array and high resolution MAPS. In this project, Compressed Sensing will be adopted to acquire the compressed samples during signal sampling. Consequently, only compressed samples require to be processed with in the following quantization, storage and output. As a result, the frame readout frequency will be increased. The project is expected to propose a high speed readout strategy based on Compressed Sensing for large array MAPS; to construct the circuit architecture of MAPS for supporting the compressed sensing readout strategy; to provide the corresponding radiation hardening strategy; and to evaluate the readout strategy and architecture by building a simulation system and performing electrical and radiation experiments. By this project, new methods and theories will be induced for the readout electronics, and the applications of MAPS will be promoted in high energy physics experiments, space exploration and biology medical imaging.

单片有源像素传感器（Monolithic active pixel sensors，MAPS）具有高集成度、高分辨率、低物质介入度以及潜在较高抗辐射水平的优点，可以在常温下达到较低的噪声水平，是低成本高性能辐射探测器的发展趋势。传统MAPS在信号读出时，对整个像素阵列进行全样本采样和量化，然后对全样本数据进行压缩和输出。面临大阵列MAPS时，传统读出方式需要读出的像素点数目增加，读出速度降低，导致传感器的时间分辨率降低。本项目拟采用压缩采样理论避免全样本的信号采样，直接在采样阶段获取信号的压缩样本，减少采样次数和样本数，从而提高MAPS的读出速度。预期目标是提出新型MAPS的压缩采样策略、电路架构、辐射加固方法以及性能评估方法。这将解决大阵列MAPS的高速读出问题，为探测器读出电子学注入新的理论和方法，同时促进MAPS在高能物理实验、深空探测以及生物医学成像等科学研究中的应用。

MAPS芯片因其低物质介入以及潜在高分辨率、低功耗、高速度以及抗辐射的特点，是粒子探测领域的研究热点。本项目基于压缩采样思想进行高速读出架构的研究，项目取得的主要成果有：第一，建立了压缩采样读出的仿真系统，能够从系统级分析压缩采样的可行性和效率；第二，完成了两种基于压缩采样的MAPS芯片体系结构及电路原理设计；第三，研究了MAPS芯片辐射加固方法，得到了一些易于扩展重用的IP核，包括抗辐射前端读出电路、抗辐射LDO、抗辐射ADC、抗辐射LVDS收发器、抗辐射存储器以及抗辐射触发器。第四，研究了高速MAPS的系统验证方法，完成了高效易用的MAPS芯片仿真验证系统。本项目的部分成果应用于我国CEPC项目硅径迹探测器的验证，其中高速外围数据读出模块直接促进了我国首款全功能的MAPS芯片的研发。