低缺陷埋氧化层的超薄绝缘层上锗结构的实现及其晶体管载流子输运特性的研究

New materials and novel device structures should be introduced to the further scaling down of the silicon metal-oxide-semiconductor field effect transistors (MOSFETs), as the fundamental and the most important component of very-large-scale integration (VLSI) circuit. Ge-on-insulator(GeOI) structure is an attractive material system that makes the best use of the high electron and hole mobility of Ge with the advantages of suppressing the short channel effects (SCEs). For archiving the advantages and the requirement of industry needs, the body thickness of Ge should be less than 10 nm. Therefore the realization of ultra-thin-body (UTB) GeOI structures and the study on the electrical properties of UTB GeOI MOSFETs are important. It has been reported that the performance degradation in UTB GeOI MOSFETs could be attributed to the defects in the buried oxide(BOX) of GeOI structure. However, the influence of defects in the BOX to the carrier transport properties and its phycical mechanisms have not been fully understood yet, in spite of its importance..In this research, the GeOI structures would be fabricated by direct wafer bonding technique. The BOX structures and the interfacial properties of Ge/BOX would be optimized by fabrication process such as introducing passivation layer. The combined thinning processes such as low temperature oxidation would be conducted for the realization of UTB GeOI structures. Based on the proposed UTB GeOI, the impact of defects in the BOX on the electrical properties of UTB GeOI MOSFETs would be quantitatively evaluated. Furthermore, the physical mechanisms of the impact of the defects in the BOX on the carrier transport properties would be systematically analyzed from the viewpoint of scattering mechanisms for the optimization of BOX structures in UTB GeOI MOSFETs.

传统硅场效应晶体管的进一步小型化已逼近其物理极限，需要引入新材料和新结构。绝缘层上锗（GeOI）结构可利用锗较高的电子和空穴迁移率获得更大电流，且更好地抑制短沟道效应，有希望被用于下一代CMOS技术中。为充分发挥GeOI的优势和满足量产化要求，Ge层厚度需小于10nm。因此，超薄（＜10nm）GeOI的实现及对超薄GeOI晶体管特性的系统研究具有重要意义。已有研究表明超薄GeOI晶体管中埋氧化层（BOX）缺陷会导致器件性能显著劣化。然而，目前关于BOX中缺陷对载流子输运特性的影响及其物理机理尚待深入研究。本项目将利用晶片键合法制备GeOI结构，采取界面钝化等手段优化BOX结构和Ge/BOX的界面特性，并利用低温氧化等方法实现超薄GeOI。通过对GeOI晶体管电学特性及缺陷的定量表征，理解BOX中缺陷对载流子输运特性影响的物理机理，为GeOI晶体管中BOX的优化提供理论和实证支持。

亚10 nm及以下集成电路技术带实现晶体管性能提升,需要引入新结构和新沟道材料。而绝缘层上锗（GeOI）结构可利用锗较高的电子和空穴迁移率获得更大电流，且更好地抑制短沟道效应，有希望被用于下一代CMOS技术中。研究表明，在超薄GeOI晶体管中，埋氧化层（Buried Oxide，BOX）缺陷会导致器件性能显著劣化。在本项目中，我们深入研究了高性能GeOI MOSFET中BOX的缺陷对晶体管电学特性和载流子传输特性的影响。通过改变制备工艺等手段，控制Ge/BOX的界面特性，实现高质量超薄GeOI结构；并以此为基础，定量评估BOX中缺陷对于GeOI晶体管电学特性的影响，系统分析BOX中缺陷对晶体管载流子输运特性影响的物理机理。更进一步地，通过变温实验和仿真手段，对超薄GeOI晶体管的背栅调制效应进行了系统分析，研究决定背栅调制效应的机理；并借助超快速测试等创新方法，对Ge晶体管栅极介质层的缺陷特性进行了定量表征和系统分析。仿真和实验结果均表明，项目所提出的改进方法可以有效改善BOX和界面质量，从而提高GeOI晶体管性能。综上所述，本项目围绕影响超薄GeOI晶体管性能提升问题，系统研究了BOX层对GeOI电学特性和传输特性的影响，为高性能超薄GeOI晶体管的优化提供了有参考价值的理论指导和实验方案。