基于射频指纹分析的芯片退化监测方法与模型研究

With the diversification of the chip functions and the complexity of the application environment, it is difficult to accurately predict the failure during the design and production stages. Therefore, the degradation monitoring and early failure warning of the chip in the working process has become a research hotspot in the field of chip reliability. Compared to traditional methods, the proposed radio frequency (RF) fingerprinting technology has great advantages in directly quantifying the small differences in the physical layer of the chip. However, in-depth studies on the mechanism of generation of RF fingerprints have not been carried out. Combining the failure mechanism of the chip, this project will study the relationship between the change of the physical layer of the chip and the RF fingerprint through the degradation parameters of the device and the interconnection. Due to the lack of accurate degradation models and accurately simulation methods of RF fingerprints, this will pose great difficulties in describing the laws between failure mechanisms and RF fingerprints. Therefore, around these key problems, it is necessary to build a degenerate RF model of the device by extracting the degraded RF parameters and to emulate the RF fingerprints by combining RF and electromagnetic modeling simulations, in order to quantify the relation between degree of chip’s degradation under various failure mechanisms and the variation of RF fingerprints, and further reveal the mechanism of generation of RF fingerprints. This study will effectively fill in the gaps in RF fingerprinting modeling analysis, propose a new method for direct monitoring of chip degradation, and promote the rapid development of RF fingerprinting technology and chip degradation monitoring technology.

随着芯片功能的多元化和应用环境的复杂化，在设计与生产阶段难以准确地预测失效，因此针对芯片工作时的退化监测和失效预警已经成为芯片可靠性领域的研究热点。相比于传统方法，拟采用的射频指纹技术在直接量化芯片物理层微小差异方面具有巨大优势。但是针对射频指纹产生机理的深入研究并未展开。本课题将结合芯片的失效机制，通过器件和连线的退化参数，研究芯片物理层变化与射频指纹的关系。由于缺少准确的退化模型以及精确拟合射频指纹的方法，这将给描述失效机制和射频指纹之间的规律带来巨大的困难。因此需要围绕这些关键问题，通过提取退化后射频参数的方法建立器件的退化射频模型，通过结合射频和电磁建模仿真的方法拟合射频指纹，最终量化各类失效机制下芯片退化程度和射频指纹变化量之间的关系以及揭示射频指纹产生的机理。本研究将有效地填补射频指纹建模分析的空白，提出直接监测芯片退化的新方法，促进射频指纹技术和芯片退化监测技术的快速发展。

随着芯片功能的多元化和应用环境的复杂化，在设计与生产阶段难以准确地预测失效，因此针对芯片工作时的退化监测和失效预警已经成为芯片可靠性领域的研究热点。相比于传统方法，射频指纹技术在直接量化芯片物理层微小差异方面具有巨大优势。本课题从芯片发射的射频指纹出发，结合芯片的失效机制，通过器件和连线的退化参数，研究退化引起的芯片物理层变化与射频指纹的关系。研究过程中，课题组采用建模、仿真、实验等手段，研究了器件退化射频模型的构建方法、射频指纹建模仿真技术、射频指纹提取识别方法等内容。在器件建模方面，基于芯片代工厂提供的工艺模型，建立了芯片失效机制下MOS晶体管和互连线的退化射频模型；在射频指纹模拟仿真方面，建立了精确的射频指纹信号建模仿真平台；在射频指纹识别方面，建立芯片失效机制下芯片射频指纹接收、处理、提取和评估平台。通过对射频指纹的模拟仿真，课题验证了各种失效机制引起的物理层变化会在一定程度上改变芯片的射频指纹。通过对样片进行老化实验和指纹识别，验证了在失效机制下芯片的退化程度和射频指纹变化量存在关系，并且可以一定程度上量化。本课题提出的监测芯片退化实验和建模方法，能够有效促进射频指纹技术和芯片退化监测技术的发展。