The implementation of common printing techniques for manufacturing short-channel OTFT Arrays and the enhancement of device performance have attracted significant consideration. However, although flexible 1-micron OTFT was already fabricated by fully-room-temperature-printing techniques, there have still been challenges in promoting yields and device performance, as well as in unveiling the micro-dynamics of printed ink droplets, the mechanism of charge carrier injection and transport. This project aims to fabricate and integrate large-area short-channel OTFT arrays by using room-temperature multi-printing processes, and also performs the investigation of microfluidic dynamics during conductive ink drying in order to reveal the dependence of printing resolution on substrate surface energy and ink surface tension. Further researches will be carried out on the “short-channel effect” in the printed devices, as well as on the suppression of this effect through the interface doping and the tunable morphology in semiconducting layers and dielectrics. Moreover, experiment results associated with the related theoretical model and numerical simulation will be used to reveal the mechanism of charge carrier injection and transport enabling large-scale integration of 1-micron-channel OTFTs and to optimize the device performance, including high field-effect mobility, low threshold voltage and operation voltage, which will provide theoretical and experimental basis for "roll-to-roll" manufacturing highly stable and reliable large-area, high-resolution OTFT arrays.
利用低成本的印刷方式制造短沟道OTFT阵列及其性能优化备受关注。在前期工作中,基于全室温印刷技术实现了1微米沟道的柔性OTFT器件制备,然而其大面积集成中成品率低,性能优化困难,且印刷动力学和器件中电荷注入传输机制也未明确。所以,本课题拟在室温环境下利用多重印刷方式集成大面积短沟道OTFT阵列,研究导电油墨在印刷过程中的微观流体动力学,揭示印刷分辨率对衬底表面能和油墨表面张力等因素的依存性;考察短沟道效应的作用机制,并通过涂布印刷的界面掺杂,丝网印刷的半导体和绝缘层的形貌调控来抑制短沟道效应;运用理论模型和数值计算来研究和评价器件中的电荷注入和传输机理,优化器件结构,进而实现器件的高迁移率和高开关比,低阈值和驱动电压。本课题预期可实现1微米OTFT的大面积集成,并揭示油墨微观动态机制以及载流子注入和传输特性,进而提高成品率和器件性能,为“卷对卷”制造高分辨电子器件提供理论基础和实验依据。
短沟道TFT阵列广泛应用于高清显示设备,高密度存储器和高灵敏传感器等领域,所以其研制和开发技术一直备受关注。本课题以柔性聚酯类薄膜为衬底,通过多重印刷技术,层层组合成高分辨OTFT阵列。通过高分辨真空紫外光(Vacuum Ultraviolet, VUV)曝光技术制备高反差的交替型疏水/亲水图案,利用水性金属纳米油墨,实现了1微米高分辨电子电路的印刷制备;并利用丝网印刷工艺/SAM技术制备导向层,以调控半导体层(可溶性小分子和高分子类)的厚度和取向性;利用溶液法沉积掺杂层(包括过渡金属氧化物,有机小分子和高分子类的电子受体材料),调控电极/半导体的界面态;以及利用计算机仿真软件对器件中的电荷注入和传输进行模拟,解析其影响因素,并优化器件结构,进而实现短沟道OTFT器件的性能提升和高可靠性。实现在构建的2英寸大面积真空紫外曝光技术基础上,柔性基板上高密度集成1微米线宽的电路阵列和大于1600个5微米沟道长度的OTFT器件,产率实现100%,同时对器件阵列进行性能优化,实现50微米器件平均迁移率超过10 cm2V-1s-1,开关比高于1000000,且驱动电压低于15V,以及考察其稳定性和耐弯曲性。该项目将为高分辨印刷电子电器提供高效低成本的技术,并实现全印刷制备实用化、性能可靠、高分辨、离散型和柔性薄膜晶体管阵列提供技术支撑和理论依据,进而有望广泛应用于可穿戴的高清显示设备,高密度存储器和高灵敏传感器等领域。
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数据更新时间:2023-05-31
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