In pulsed power storage technology, high dielectric constant, high breakdown and low loss are key parameters for the next generation of high energy density capacitors. Polymer-based nanocomposite is a promising candidate material for the new pulse power capacitor. However, it is difficult in current researches to enhance the dielectric constant and breakdown strength with low loss as well. In order to explore the interfacial characterization in the composite and loss during charge-discharge cycle, a polar-fluoropolymer multilayer film consisting of high energy density poly(vinylidene fluoride- chlorotrifluoroethylene) (P(VDF-CTFE)) and low loss poly(vinylidene fluoride-trifluoroethylene-chlorofluoroethylene) (P(VDF-TrFE-CFE)) is fabricated. The tuned multilayered nanostructure is designed to reduce the dielectric hysteresis and suppress the formation of conductive paths. The phase, crystal structure and interphase of multilayer film are tailored by the fabrication and post process. The influence of nanostructure on the dielectric property, polarization, energy storage performance and charge-discharge cycle loss of multilayer film will be investigated. The mechanism of energy loss in PVDF-based multilayer film under high electrical field will be developed. The correlation between multilayer structure and practical performance during device operation is to be explored, which should lay the theoretical groundwork for the dielectric properties enhancement, featuring great intellectual merits and broad engineering implications of PVDF-based dielectrics.
在脉冲储能技术中,具有高介电常数,高击穿场强以及低损耗的介电材料是实现下一代高能量密度脉冲储能技术的关键。聚合物基电介质材料是高储能密度电容器的重要组成部分,然而,如何有效改善聚合物电介质的介电性能,同时降低损耗是当前研究的难点。本项目针对介电材料界面层特性及高场强时薄膜损耗问题,采用聚(偏氟乙烯-三氟乙烯-氯氟乙烯)(P(VDF-TrFE-CFE))、聚(偏氟乙烯-氯三氟乙烯)(P(VDF-CTFE))制备双组份交替多层膜。通过对制备过程和后处理包括退火、拉伸和交联等工艺参数的调节和优化,实现对多层膜晶体结构、结晶相组成和界面的调控,研究多层膜结构对介电性能、极化行为、电导率和储能性能的影响规律,分析高场强时多层膜的损耗表现形式,探讨高场强下PVDF基多层膜的损耗机制,建立多层膜结构和储能效率之间的关系,为PVDF基储能电介质材料的开发提供数据支撑和理论指导。
在脉冲储能技术中,具有高介电常数,高击穿场强以及低损耗的介电材料是实现下一代高能量密度脉冲储能技术的关键。聚合物基电介质材料是高储能密度电容器的重要组成部分,然而,如何有效改善聚合物电介质的介电性能,同时降低损耗是当前研究的难点。本项目针对介电材料界面层特性及高场强时薄膜损耗问题,采用聚(偏氟乙烯-氯三氟乙烯)(P(VDF-CTFE))、聚(偏氟乙烯-三氟乙烯-氯氟乙烯)(P(VDF-TrFE-CFE))制备复合膜。通过对制备过程和后处理包括退火、拉伸和交联等工艺参数的调节和优化,实现对多层膜晶体结构、结晶相组成和界面的调控,研究其对介电性能、极化行为、电导率和储能性能的影响规律,分析高场强时多层膜的损耗表现形式,探讨高场强下PVDF基多层膜的损耗机制,建立多层膜结构和储能效率之间的关系,为PVDF基储能电介质材料的开发提供数据支撑和理论指导。
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数据更新时间:2023-05-31
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