With the advancement of functions of mobile devices such as smart phones and the diversity of wireless communication standards, software-defined radio (SDR) has recently become a hot research topic in the cross field of wireless communications and integrated circuits. Multi-mode digital RF receiving technique, which is based on the concept of trading time-domain resolution for voltage-domain resolution, improves the digitalization and reconfiguration of RF front-end circuits fundamentally.It also breaks through the restraint in the conventional design of SDR which heavily relies on the cascode of front-end circuits in-parallel to support multi-standard. This project will make a deep research on the theory of discrete-time charge-based signal processing and transferring in digital RF receiving circuits. We will analyze the impacts of non-idealities such as timing jitter on the charge sampling mixer, which is regarded as a core circuit, and then set up a comprehensive model of digital RF receiving circuits for SDR as well as the corresponding unified interface circuit model. Such circuit models will be packaged as an independent processing element in a heterogeneous multi-processor system-on-chip (MPSoC). The project will provide an efficient solution to the problem of the support of multi-mode and multi-standard receiving in RF front-end circuits of SDR. The implementation of the project will improve the research and advancement of digital RF circuits significantly, and provide theoretical background for the development of the new-generation SDR MPSoC.
随着以智能手机为代表的手持移动终端设备功能的日益丰富,所支持的无线通信协议标准愈发多样,软定义无线电系统成为当前无线通信与集成电路交叉领域的研究热点。多模式数字射频接收技术基于时间域精度换取电压域精度的设计思想,从根本上提高了射频前端接收电路的数字化程度和可配置能力,突破了软定义无线电系统依赖多套射频接收电路堆叠以支持多协议多标准接收的传统设计方案限制。本项目深入研究基于电荷离散值的数字射频接收电路信号处理与传递机制理论,分析核心电路电荷采样混频器受时钟抖动等非理想性因素的影响,建立面向软定义无线电系统的数字射频接收电路模型及配套的统一化接口电路模型,并封装成独立处理单元接入异构多核系统,解决软定义无线电系统在射频前端级对多模式多标准接收的有效支持问题。本项目的实施将有力地推动数字射频电路技术的研究与发展,为新一代单芯片软定义无线电系统的研制提供应用理论基础。
随着以智能手机为代表的手持移动终端设备功能的日益丰富,所支持的无线通 信协议标准愈发多样,软定义无线电系统成为当前无线通信与集成电路交叉领域的研究热点。多模式数字射频接收技术基于时间域精度换取电压域精度的设计思想,从根本上提高了射频前端接收电路的数字化程度和可配置能力,突破了软定义无线电系统依赖多套射频接收电路堆叠以支持多协议多标准接收的传统设计方案限制。本项目研究基于电荷离散值的数字射频接收电路信号处理与传递机制理论;研究核心电路电荷采样混频器、振荡器等受纳米尺度CMOS工艺下各类电路非理想性因素及工艺偏差的影响,及其自感知与自校准技术;对数字射频接收电路进行了仿真设计,及其部分核心电路的设计实现;在此基础上,进一步对软定义无线电多核片上系统平台进行了研究,包括异构多核任务映射算法、工艺偏差对多核片上网络可靠性的影响、仿真加速技术及高层次性能评估仿真平台等。本项目的实施有力地推动数字射频电路技术及软定义无线电片上多核系统的研究与发展,为今后单芯片软定义无线电系统的研制提供了应用基础。
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数据更新时间:2023-05-31
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