百端口偏振无关低损耗的高速宽带硅基集成光开关阵列

It is highly demanded to develop a large-scale high-speed optical switch matrix to construct high-speed optical network systems for telecommunication and data-communication applications. Silicon photonic switches are widely considered to be promising for that they are high-density-integrated, energy-saving, and low-cost, since silicon photonic devices are based on silicon-on-insulator (SOI) substrates and can be fabricated with CMOS processes. However, due to the high transmission loss, complicate switch controlling and polarization dependence of silicon photonic switches, their applications are limited. Therefore, we propose a low-loss polarization-independent optical switch matrix with more than 100 input/output ports based on silicon photonic integrated technology. Our studies will focus on the following issues: 1) Monolithic integration of silicon-based III-V compound semiconductor optical amplifier (SOA) based on heteroepitaxial growth of III-V semiconductor materials on SOI substrates. 2) In-situ power monitor realizing and setting in larger-scale silicon switch matrix for operation monitoring and reducing system crosstalk. 3) Polarization-independent silicon waveguide switches and polarization controlling systems for fabricating polarization-independent silicon switch matrix. Based on the researches on these issues, we will experimentally demonstrated a 64x64 high speed silicon electro-optic controlling optical switch matrix with a bandwidth wider than 50nm. We will also try to fabricate a 128x128 high-speed silicon optical switch for challenging larger scale silicon photonic monolithic integration. The researches we proposed on common issues of on-chip silicon-based III-V SOA, in-situ operation monitoring, polarization-independent silicon waveguide switches and 64x64 high-speed wideband silicon optical switches would be very important for the development of large-scale silicon optical switch matrix, as well as the development of silicon photonic integration technologies.

信息社会和大数据时代的飞速发展对光通信网络、高性能计算机和数据中心光信息交换能力的要求日益提高。光交换主要器件之一大规模高速低耗光开关阵列发展滞后，已成为光网络、高性能计算和数据中心发展的关键瓶颈。本项目面向社会实际需求，发挥硅基光子器件高集成度、低功耗、低成本优势，从研究百端口硅基高速宽带光开关阵列入手，分析提炼并研究硅基光开关乃至硅基光子芯片集成面对的共性关键课题：研究实现片上集成硅基异质生长III-V族半导体光放大器以降低光开关损耗；研究阵列内置监测器以监测全器件单元均衡性抑制开关串扰；研究偏振无关波导光开关及偏振控制器件以解决硅基开关偏振相关问题。项目将实现64x64以上百端口硅基高速宽带光开关阵列及系统演示，突破光开关阵列及硅基光子器件规模集成的片上放大、在线监控和偏振无关等共性关键问题，形成拥有完全自主知识产权的先进器件解决方案，有力推进国家光电子器件和信息产业的迅速发展。

信息社会的飞速发展对光通信网络、高性能计算机和数据中心光信息交换能力的要求日益提高。高速光交换集成芯片是实现高效、绿色节能的高性能计算机和数据中心的必备核心器件。本项目重点研究可实现大端口规模、高速数据交换的光开关阵列芯片。.项目在硅图形衬底上首次实现高质量III-V族异质外延生长薄膜，薄膜表面平整度≤1nm，位错密度≤107/cm2；基于该衬底，生长和制备出高性能硅基集成InAs/GaAs量子点光源和光放大器，硅基激光器最大输出功率≥30mW，硅基光放大器光学增益≥15dB。首次提出基于Benes网络的可迭代简化在线监测技术，突破大规模光开关网络内部单元工作点监测及系统调试瓶颈、大幅降低了4×4以上Benes网络光开关的实现难度。创新提出在硅基MZI电光开关中预置π/2相位偏置、实现MZI双臂推挽平衡控制，解决了由于电光调制光吸收率变化引起的MZI双臂不平衡、消光比恶化问题。研制出32×32硅基电光开关阵列芯片、64×64硅基热光开关阵列芯片以及最大规模的128×128硅基热光和电光开关阵列芯片。其中，电光MZI开关单元插损1~1.2 dB，开关时间≤1.2 ns，开关功耗≤3 mW；热光MZI开关单元插损0.2~0.3 dB，开关时间≤21μs，开关功耗≤25 mW。同时还研制出了相关多种高性能硅基光电子器件，如损耗仅为8 mdB的最低损耗平面硅交叉波导，以及损耗仅为1.4 mdB的三维交叉波导；耦合损耗仅为1.73 dB的光栅耦合器；适用于芯片大规模端面阵列耦合的端面耦合器，器件损耗仅为1.2 dB；最小插入损耗为1.87 dB主动偏振控制模块，偏振相关损耗≤0.4 dB，用于实现偏振无关光开关系统。可作为片上集成光功率监测器件的Ge/Si光电探测器，响应度≥0.8 A/W @2 V、带宽24 GHz @4 V、暗电流≤10nA。项目研究出多种用于光开关阵列及硅基光电子集成芯片的共性关键器件，器件性能达到或超过世界一流水平，为光交换、光计算、激光雷达等大阵列光电器件集成技术发展提供了先进技术保障。.项目团队共发表论文29篇，其中期刊论文23篇、会议论文6篇，SCI收录25篇，EI收录8篇；培养毕业博士生11人，硕士生3人；申请发明专利23项，其中6项获得授权。