面向赛道存储器多核嵌入式系统的调度与数据分配研究

Memory accesses in embedded systems account for a large percentage of time and energy consumption, especially for those who run data-intensive applications. A memory with large capacity, high performance, and low energy consumption becomes more and more desirable for embedded systems. Recently, emerging Non-Volatile Memories (NVM) have captured considerable attention of academia and semiconductor industry, and been considered to take place of traditional memory for improving memory access performance and decreasing access energy consumption. Racetrack Memory has many attractive characteristics such as high density, low standby power, and best-case access latencies comparable to SRAM, which is a promising replacement for SRAM as on-chip memory and DRAM as main memory. However, the access speed of Racetrack Memory varies. In this project, we will conduct a research on multicore embedded systems with Racetrack Memory. According to the task dependency and data access model of applications, we will propose both task-level and instruction-level scheduling along with data allocation strategies, and dynamic migration policies, such that the performance and energy consumption of multicore embedded systems with Racetrack Memory will be optimized. The proposed techniques in this project will provide theoretical basis for the implementation of Racetrack Memory in embedded systems.

随着数据密集型应用的增加，嵌入式系统的存储访问开销极大的影响了其性能与能耗。当前，嵌入式系统对于大容量、高性能、低功耗存储介质的需求愈加迫切。近年来，一些新型的非易失性存储器得到了学术界和产业界的广泛关注，成为了解决存储系统性能和功耗问题的最为引人瞩目的新一代存储器件。赛道存储器凭借其高集成密度、低静态功耗以及可与SRAM匹敌的访问速度，被认为可以替代传统存储介质作为嵌入式系统片上存储器与主存储器。但是赛道存储器访问速度不固定的问题极大的制约了其性能与能耗。本项目面向基于赛道存储器的多核嵌入式系统，结合嵌入式应用的任务处理与存储访问模型，建立考虑赛道存储器访问特性的系统性能与能耗模型，在系统软件层设计任务级和指令级两个层次的调度与数据分配策略，研究数据的动态迁移策略，优化多核架构下赛道存储器的性能与能耗，进而提高系统性能，降低系统能耗，为将赛道存储器应用于多核嵌入式系统奠定理论研究基础。

本项目面向赛道存储器多核嵌入式系统，以性能与能耗建模、调度与数据分配策略设计、数据迁移策略设计为研究主线，在以下三方面取得了重要研究成果：1）针对赛道存储器作为缓存的多核系统，设计了性能与能耗模型，并提出了赛道存储器端口设计、任务调度和数据分配等软硬件相结合的优化技术；2）针对由赛道存储器构成的混合型存储器，设计了性能与能耗模型，并提出了指令级调度、数据分配和数据迁移相结合的优化技术；3）针对基于斯格明子构成的赛道存储器，提出了计算架构与存储访问相结合的优化技术。共发表学术论文7篇，其中包括CCF A类2篇，CCF B类2篇；培育非易失性存储器以及相关领域硕士生4名；参加国际会议3次，国内会议3次。本研究工作能够推动赛道存储器在嵌入式系统的应用进程，为将赛道存储器应用于嵌入式系统奠定一定的理论基础。