基于多回路解耦的高开关性能碳化硅功率模块研究

Silicon Carbide (SiC) power semiconductors have prominent switching performance merit compared to their Si counterparts, while the merit is limited due to the multi-loop time-variable coupling issue within power semiconductor modules during the fast switching transient. Research efforts have shown the effective decoupling during the current transition stage through reducing the power module parasitic inductances; however, the way for voltage transition decoupling is still missing. To address this critical issue, the proposed project aims to develop a novel power module circuit capable of simultaneously realizing decoupling functions for both stages, and fabricate a power module prototype based on the novel circuit. The specific research aspects include: 1) Develop a novel circuit topology with dv/dt decoupling network, verifying feasibility of the proposed idea in terms of fundamental circuit theory; 2) Based on the novel circuit topology, design the corresponding packaging and integration method, and fabricate the power module prototype; 3) Analyze the switching performance improvement of the fabricated power module experimentally and theoretically under different switching modes. The project applicant has around ten-year solid research experience in power module design and switching performance characterization. Successful development of the power module enables the full utilization of the SiC devices’ switching performance, reduction by half of the switching time and around thirty percent of the switching loss, which would eventually contribute to the breakthrough of fundamental technologies for high power density power electronics converters as well as facilitate the wide adoption of SiC devices in such applications as transportation electrification.

碳化硅（SiC）功率芯片较对应的硅功率芯片具有显著的开关性能优势，然而其在开关瞬态与功率模块的多回路时变耦合极大地限制了该优势。已有研究通过减小功率模块寄生电感实现了电流切换阶段的有效解耦，但缺乏在电压切换阶段的应对方法。为解决该关键问题，本项目力求建立新型功率模块电路，同时实现两个阶段的多回路解耦，并以此为基础制作功率模块。具体研究内容包括：1）建立带dv/dt解耦网络的新型电路拓扑，从电路原理上证明研究思想的可行性；2）基于新型电路拓扑，设计相应的封装集成方法并制作功率模块；3）从实验和理论上分析新型功率模块在不同开关模式的性能改善情况。项目申请人在功率模块设计和开关特性研究方面具有近十年的扎实研究基础。成功研制该功率模块将使SiC芯片充分发挥其开关性能，缩短约一半开关时间并减小近30%开关损耗，突破高功率密度电力电子变换器的基础技术瓶颈，并推动SiC芯片在电气化交通工具等场合的应用。

碳化硅（SiC）功率芯片相较于传统Si功率芯片具有全面的开关性能优势，然而其在开关瞬态与功率模块多个回路的强耦合关系极大地限制了其开关性能。设计功率模块实现SiC功率芯片与各回路的解耦以充分发挥其高开关性能优势是亟待解决的科学问题。经过三年的研究，本项目对于SiC功率模块多个回路在dv/dt阶段和di/dt阶段的解耦研究均取得了重要进展。在dv/dt阶段回路解耦研究上，首先，针对SiC电机驱动系统建立了SiC功率模块输出回路的二端口网络模型。然后，基于输出回路中电缆的分布参数电路推导了输出回路二端口网络传递矩阵的解析表达式，完成了SiC功率模块dv/dt耦合机理分析；最后，基于dv/dt耦合机理分析结果，提出了一种新型dv/dt解耦电路拓扑，实验证明了该解耦电路最高能够将SiC功率模块的开通时间减少15.2%，关断时间减少45.6%，开关损耗降低19.7%，并且能够有效抑制电机机端过压。在di/dt阶段回路解耦研究上，本项目提出了一种耦合寄生网络模型，通过考虑开关瞬态涉及的部分自感及部分互感，实现了多芯片SiC功率模块功率回路与栅极驱动回路电磁耦合关系的准确表征。通过研究由布局占主导因素的动态均流机理，建立了实现多芯片SiC功率模块动态均流和多回路解耦的条件。然后，采用响应面建模法评估部分自感及部分互感，解决了功率模块布局布线的非线性寻优问题，建立了一套实现动态均流和多回路解耦的功率模块布局设计及布线优化方法。最后，制作了功率模块的实物样品并进行了实验，验证了提出的模型、机理分析和设计优化方法的有效性。通过回路解耦将并联MOSFET的动态电流峰值差异降低至2.15%。上述相关研究为未来SiC功率模块在电气化交通等领域的应用解决了部分关键科学问题，具有理论和应用价值。