GaN based devices have broad application prospects in areas such as semiconductor lighting, new generation mobile communications, energy internet, sophisticated military and consumer electronics. Obtaining GaN single crystal with low dislocation density as native substrate for device growth is the key to improve device performance. At present, most of GaN single crystals are grown on sapphire substrates with a GaN epilayer. During growth, dislocations in epilayers extend to GaN single crystals, leading to high dislocation density in GaN single crystals. In order to solve this problem, this project intends to study the high temperature decomposition mechanism of GaN at dislocation sites and develop high temperature pretreatment process of substrate, which can make GaN epilayer decompose into small and deep decomposition pits at dislocation sites to block the extension of dislocations. The specific research contents of this project are as follows: Analyzing the priority decomposition mechanism of GaN at dislocation sites; Building dislocation structure model and studying the formation and morphology change mechanism of decomposition pits under different high temperature pretreatment conditions; With guidance of this mechanism, developing high temperature pretreatment process to obtain substrates suitable for GaN growth and finally reduce dislocations in GaN single crystals. The implementation of this project can promote the development of GaN industry. Thus it is of great significance and application value.
GaN基器件在半导体照明、新一代移动通信、能源互联网、尖端军事、消费类电子等领域有广阔的应用前景,而获得低位错密度的GaN单晶作为器件生长的同质衬底是提高器件性能的关键。目前,GaN单晶大多在拥有一层GaN外延层的蓝宝石衬底上生长,在生长过程中,外延层的位错延伸到GaN单晶中,导致GaN单晶位错密度过高。为解决这一问题,本项目拟通过对GaN位错处的高温分解机理进行系统研究,开发衬底高温预处理工艺,使GaN外延层在位错处优先分解形成分解坑来阻断位错的延伸。本项目的具体研究内容包括:分析GaN位错处的优先分解机理;建立位错结构模型,研究不同衬底高温预处理条件下分解坑的形成以及形貌变化机制;以此为指导开发高温预处理工艺,获得适合GaN单晶生长的衬底并在其上进行GaN单晶的生长,最终达到减少GaN单晶中位错的目的。本项目的实施能够促进GaN产业的发展,具有重要的研究意义和应用价值。
作为第三代半导体材料的代表,GaN具有带隙宽、饱和电子速率高、击穿电压大、导热性能好等特点,在节能产业、尖端军事、空间用电子器件等领域应用前景巨大。由于缺乏同质衬底,GaN单晶大多在拥有一层GaN外延层的蓝宝石衬底上生长。在生长过程中,外延层的位错延伸到GaN单晶中,导致GaN单晶位错密度过高,严重降低了以GaN单晶为衬底的器件的性能和使用寿命,阻碍了GaN单晶的发展。针对这一问题,本项目对GaN位错处的高温分解机理进行了系统研究,开发了衬底高温预处理工艺,使GaN外延层在位错处优先分解形成分解坑从而阻断了位错的延伸。本项目取得了以下研究成果:(a)建立了GaN位错处的三维结构模型,通过热力学分析与第一性原理计算阐释了GaN位错处优先分解的机理并研究了GaN分解坑不同晶面的稳定性,揭示了退火坑形貌变化机制;(b)获得了最佳的衬底高温预处理工艺:退火时N2流量300sccm,退火温度1150℃,退火时间10min。采用最佳工艺对衬底进行退火,能够在位错处获得小而深的退火坑,这种退火坑能够通过侧向外延合并,不影响GaN单晶的生长,且能够有效阻断位错,有利于GaN单晶位错的减少;(c)开发了低温缓冲层技术,提高了GaN单晶质量,获得了最佳低温缓冲层生长工艺:低温缓冲层厚度800nm,退火温度1090℃;(d)成功将GaN单晶中的位错密度降低到105cm-2。本项目为减少GaN单晶中的位错密度提供了一种新方案,能够促进GaN产业的发展,具有重要的应用价值。
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数据更新时间:2023-05-31
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