高性能巨介电材料的缺陷簇结构构筑、调控及其性能关联

Dielectric materials are fundamental in electronic devices e.g. capacitors. The trend in device developments, in terms of fast response, miniaturization and intelligentization, demands high-performance colossal dielectric materials. However, simultaneous colossal permittivity, low dielectric loss, small temperature coefficient and high resistivity are not yet achieved. The practical solution to such a challengeable issue is thus significant for applications.. This project, based on previous studies, proposes a new strategy termed ‘structure-correlated defect clusters’, aiming to optimize dielectric properties and synthesize high-performance colossal materials through effectively controlling over the electron local hopping in defect clusters and constraining the long-range transport of space charges. To this end, this project will be carried out based on a non-ferroelectric perovskite ABO3 (A=Ca/Sr, B=Ti) matrix, with deliberately producing defect clusters locally. Bond Valence Sum (BVS) calculation method will be used to predict the structural properties to obtain the appropriate A/B-site hetero-ion dopants. The structures of the defect clusters will be well tuned based on the hetero-ion components and their compositions, concentrations as well as the synthesis conditions and processes, etc. Further, how the hetero-ion variations and induced defect clusters affect the dielectric properties will be studied to further control over the local defect clusters for the purpose of dielectric parameters optimizations, which is helpful for final fabrication of high-performance dielectric material. This project, with the aim of establishing the correlation model between colossal dielectric properties and local defect clusters based on the experimental studies, is thus expected to realize the transplantation for the structural model to be proposed as well as the high performance for the material to be studied, which opens a window for the exploration of new colossal dielectric materials.

介电材料是电容器等电子元器件基本材料。器件快速响应、小型化和智能化发展要求高性能巨介电材料。然而，高介电常数、低介电损耗、小温度系数和高绝缘电阻目前尚不能同时兼顾，解决这一挑战性问题对实际应用具有重要意义。. 本项目在前期工作的基础上提出缺陷簇结构关联的研究思路，通过控制缺陷簇结构电子的局域迁跃和抑制空间电荷长程迁移，实现介电性能综合最优化，制备高性能介电材料。本项目选择二元非铁电钙钛矿氧化物ABO3（A=Ca/Sr，B=Ti）为基体，通过Bond Valence Sum (BVS)筛选A/B位异质离子掺杂，调控离子组分、组合、掺杂量演变和材料制备工艺，构筑缺陷簇；研究掺杂变量与缺陷簇对介电性质的影响规律，调控缺陷簇结构以优化介电参数，制备出高性能巨介电材料。通过该项目的研究，建立巨介电性质与缺陷簇结构关联，实现所提出结构模型的可移植化和所研究材料的高性能化，指导巨介电新材料体系开发。

1、研究背景. 巨介电材料是满足电子元器件快速响应、小型化和智能化发展亟需的重要材料。经过二十年（基于2000年Subramanian等人首次报道CaCu3Ti4O12巨介电效应）探索研究，开发出多种巨介电新材，提出多种巨介电起源机理。然仍存在两个重要基础问题，一是具有高性能巨介电性质（高介电常数、低介电损耗、小温度系数和高绝缘电阻率等）的材料体系仍然匮乏；二是对于一些巨介电机理的理解，例如广受采纳的界面效应以及缺陷机制等，仍存在争议，并且实验模型和理论解析尚未建立起来。.2、研究内容. 本项目针对上述两大重要问题，提出缺陷簇构筑与介电性质关联的研究思路，在(Sr0.8Ca0.2)1-xAxTi1-yByO3（SCTO）、Li1-xAxCuNb3-xByO9（LCNO）、NiNb2O6（NNO）中获得巨介电性质，在(Li+In)-MgO（LIMO）中实现本征介电常数提升；通过Bond Valence Sum方法筛选掺杂离子，调控材料制备工艺，优化介电性质；通过对晶体结构、局域结构、缺陷簇结构等系统探测表征（精修、EPR、XPS、ED、Raman等），阐明巨介电性质起源，并提出新局域结构和等效电路模型，建立新理论。.3、研究结果. 1）SCTO中，通过控制缺陷簇结构电子的局域迁跃和抑制空间电荷长程迁移，实现介电性能综合最优化，制备高性能介电材料，即：ε~13000；tan~0.02；TCC~-20%-+15%；R>10GΩ·cm（参数经工业和信息化部标准化测试认证）。系统表征证实形成了A位空位、B位电子和氧空位缺陷簇，A-B位形成关联偶极子，产生超距离相互作用。. 2）LCNO和NNO中，系统表征阐明：高ε起源于Cu+/Cu2+跳跃时晶格扭曲形成Mott极化子（Mott-VRH机制），该机制需借助于B位NbO6八面体作为桥介；阳离子（Ni/Nb）有序无序决定极化子产生和迁跃方式，并关联巨介电性质。. 3）LIMO中实现ε显著提升，指出界面效应-砖块模型的不严谨性，提出缺陷偶极子弛豫等效电路模型，根据kramers-kronig关系，推导出电路弛豫频率的解析方程。.4、科学意义. 1）提出新的缺陷簇结构构筑方法并制备出高性能巨介电材料，对材料设计和应用提供重要指导。. 2）首次推导出可描述德拜和非德拜弛豫现象的解析方程，是对电介质普适理论的重要补充。