高性能薄膜SOI硅锗异质结晶体管机理研究

The flexibility of the silicon-on-insulator (SOI) device architecture allows the obtaining of optimal electrical property for reduced parasitic parameters and low leakage current, and the SiGe HBT (heterojunction bipolar transistor) is not only fast in speed and cheap in price but also compatible with the Si technology. The fully-depleted SiGe HBT fabricated on SOI substrate shows decent performances, such as better current linearity, better trade-off between the avalanche breakdown voltage and the characteristic frequency, and is integrated into the next millimeter-wave SOI SiGe BiCMOS technology.Therefore the SOI SiGe HBT is applied to high speed and low power chips including mobile communication, auto electronics, the radar, and so on. As the advantages of the device are thoroghly reported by experiments and simulations, the corresponding models should be analyzed theoretically.The purpose of the project is to model and test the SOI SiGe HBT. The performance enhancement mechanisms of critical parameters are analyzed, the current linearity, the breakdown voltage, and the characteristic frequency are modeled, based on the unique sturture of the SOI SiGe HBT. This previous work shows how the unique features of the device can be linked to its fundamental physical parameters such as the doping concentrations, the Ge content and profile, and geometric parameters such as the base width, the collector width, and the collector length. Eventually the optimization method for the SOI SiGe HBT is proposed, the process flow is improved, and the device is fabricated. With the comparison between the models and experiments, the optimized SOI SiGe HBT architecture is obtained.

SOI(绝缘体上硅)降低寄生、减小漏电，SiGe HBT（硅锗异质结晶体管）与Si兼容，速度快，成本低。下一代毫米波SOI SiGe BiCMOS工艺中薄膜SOI全耗尽SiGe HBT电学性能优越，电流线性度高，击穿电压大，频率特性好，广泛应用于移动通信、汽车电子、雷达等高速低功耗芯片，但与其高速高性能密切相关的理论模型尚欠成熟。本项目拟开展SOI SiGe HBT的理论与实验研究。根据SOI SiGe HBT结构特点，分析SOI SiGe HBT关键参数性能增强机理，建立电流线性度、击穿电压、特征频率等核心电学参数模型，将其与掺杂浓度、Ge组分及分布等基本物理参数，和基区宽度、集电区宽度、集电区长度等几何结构参数关联起来，在此基础上，提出SOI SiGe HBT的优化设计方法，确定器件制备工艺流程并研制器件，将核心电学参数测试数据与所建模型对比，获得优化的SOI SiGe HBT结构。

与常规Si BiCMOS工艺相比，SOI(绝缘层上硅) SiGe BiCMOS技术寄生效应小，速度快，广泛适用于移动通信、汽车电子、雷达等高速低功耗应用。其中的核心器件SOI SiGe HBT电学性能优越，电流线性度高，击穿电压大，频率特性好，但是相关电路仿真模型还有所欠缺。本项目开展了SOI SiGe HBT的理论与建模测试分析，首先根据结构特点建立了SOI SiGe HBT等效电路图，据此建立了关键电学参数模型，包括任意Ge组分下的归一化正反向Early电压，基于集电区掺杂浓度和宽度、长度的集电结击穿电压，部分耗尽和全部耗尽工作模式下集电结耗尽层渡越时间，以及考虑电流集边效应的基区电阻模型。基于所建数学模型，对SOI SiGe HBT进行优化设计，最后获得优化的SOI SiGe HBT结构为发射帽层/发射区/阻挡层/基区/阻挡层/集电区/SOI/衬底，同时对相关器件的辐照特性进行了测试分析。本项目为薄膜SOI SiGe BiCMOS器件及电路的设计与制备提供了有意义的指导。