垂直型氮化镓功率MOSFET新结构与沟道特性机理研究

Vertical GaN-on-GaN power MOSFET is capable of breaking the voltage and power rating limit of lateral GaN-on-Si power transistor, and has been recognized as one of the cutting-edge research topics toward high-efficiency and high-power-density devices. Nevertheless, vertical trench GaN-on-GaN power MOSFET is currently confronted with the key challenges of realizing reduced channel resistance and effective threshold voltage modulation. Aiming at tackling these issues, this project proposes a novel vertical GaN MOSFET structure based on the interface charge modulation (ICM) concept, and systematically investigates device mechanisms including: (1) To reveal the underlying mechanism of the polarization-charge-based interface optimization in influencing the carrier mobility and channel performance, which is critical for channel resistance reduction; (2) To reveal the impact of the slanted gate trench formation and interface engineering process on the interface charge distribution, which can provide guideline for the realization of normally-off GaN trench MOSFET with desirable threshold voltage. With the theoretical and experimental studies in this project, 1.2kV~1.7kV vertical GaN power MOSFETs with desirable threshold voltage and enhanced channel performance will be realized, which is also valuable for further optimization of the on-state performance in vertical GaN power MOSFET.

垂直型氮化镓（GaN-on-GaN）功率MOSFET可突破平面型GaN-on-Si功率开关管在耐压和功率等级等方面的限制，是高效高功率密度电力电子器件研究的前沿课题之一。针对当前垂直型沟槽结构GaN-on-GaN功率MOSFET沟道电阻较高和阈值调控机制不清的问题，本项目以III族氮化物独特的极化电荷为出发点，提出基于界面电荷调控（ICM）机制的垂直型GaN MOSFET新结构，重点开展以下研究：（1）揭示基于极化电荷的新型界面优化方法对载流子迁移率和沟道性能的影响机理，为高效GaN MOSFET导通电阻的降低开辟新途径；（2）探明斜栅刻蚀和界面工艺对沟槽结构MOSFET界面电荷的影响规律，为常关型沟槽结构GaN MOSFET的阈值调控提供理论指导。本项目预期实现具有理想阈值电压、优异沟道性能的1.2kV~1.7kV垂直型GaN功率MOSFET，为通态性能的提升和优化奠定理论基础。

垂直型GaN-on-GaN功率MOSFET可拓展平面型GaN-on-Si功率开关管在耐压和功率等级方面的限制，是国际功率半导体研究的前沿方向之一。本项目针对沟槽型垂直GaN MOSFET沟道特性与阈值电压调控机制不明的问题，从器件结构设计、关键单步工艺方法、工艺整合与芯片研制、表征测试与机制研究等多方面开展了研究工作，完成了针对1.2~1.7kV垂直型MOSFET的GaN-on-GaN外延与器件结构设计，攻克了低损伤栅槽刻蚀、P-GaN埋层再激活、等离子体表面预处理、MOS界面插入层形成、低阻欧姆接触形成、终端多能量离子注入等关键工艺，完成了工艺整合和芯片研制。探明了晶面、界面工艺、界面电荷等对于MOS界面特性和阈值电压的影响规律，为新型高效常关态GaN MOSFET通态性能的提升和优化奠定了理论基础。所研制的垂直型GaN-on-GaN功率MOSFOET满足如下技术指标：耐压~1.4 kV，比导通电阻~5.0 mΩ·cm2，导通电流密度~2 kA/cm2, 较理想的阈值电压~4.5 V。. 研究成果共发表学术论文16篇，其中在国际权威期刊发表11篇SCI论文，在功率半导体领域国际顶级会议IEEE ISPSD发表4篇EI论文，受邀为国际产业界杂志Compound Semiconductor撰写1篇特邀专题文章，项目负责人受国内外会议邀请做特邀报告3次；申请5项国家发明专利，获授权3项。在本项目的资助下，共培养9名硕博士研究生，其中2名博士研究生和2名硕士研究生已毕业。在本项目的培育下，项目负责人获得中达青年学者奖（2020年）、中国电源学会优秀青年奖（2020年）、电源领域“最美科技工作者”称号（2021年），入选IEEE EDS Power Devices and ICs Committee、IEEE高级会员；所指导学生4人次获国家奖学金、王国松奖学金（电气学院最高荣誉）。.