基于混合信号片上图像压缩技术的超低功耗CMOS图像传感器研制

With the rapid development of technology, higher performance image sensor is required, especially for wireless sensor network application, where pixel resolution, signal quality and power consumption are three main criteria. The design object is high performance image sensor integrated circuit. Following the low power techniques, this project aims in high efficient image compression, improving the system energy efficiency and reducing the requirement for data storage. This project begins from sensor on-chip image compression mechanism, with structural decomposition methods of 'image compression algorithm - analog-to-digital conversion - bit image processing unit'. Based on previous results, this project systematically investigates image sensor on-chip signal processing theory of 'compression - quantization - storage' and also investigates the reconfigurable analog-to-digital integrated circuit based on SAR/single slope structures to meet the ultra-low power column-parallel quantization goal. This project proposes novel bit image processing circuit architecture, based on mixed signal IC structure and circuit power consumption and area optimization. By realizing complete high performance CMOS image sensor single chip, this project will provide a solid support to realize the state-of-the-art high performance imaging system.

随着科技的飞速发展，用户对高性能图像传感器的需求越来越高，特别是在无线传感器网络等领域，像素分辨率，信号质量和功耗是最关键的三个指标。本项目以高性能图像传感器集成电路的研制为研究对象，以低功耗技术为主线，以提高图像压缩效率、提高系统能量效率和减小存储器需求为三个目标。以研究传感器片上图像压缩的机制为切入点，以“图像压缩算法-模拟数字转换-位图处理单元”的结构化分解为手段。在前期成果的基础上，系统地研究基于“压缩-量化-存储”的图像传感器片上信号处理理论。探索基于连续逼近和单斜坡型电路结构的可重构式模拟数字转换器集成电路，并使之适用于超低功耗列并行式量化目标。提出创新的位图处理电路架构，基于数模混合集成电路结构，优化读出电路的功耗和面积。通过实现完整的高能效CMOS图像传感器单片集成电路，为实现国际领先的高性能成像系统提供坚实的理论和实践支撑。

随着科技的飞速发展，用户对高性能图像传感器的需求越来越高，特别是在无线传感器网络等领域，像素分辨率，信号质量和功耗是最关键的三个指标。目前我国在该领域仍远远落后于发达国家，严重制约着我国成像系统的性能提升及核心竞争力的增强。本项目以高性能图像传感器集成电路的研制为研究对象，以低功耗技术为主线，以提高图像压缩效率、提高系统能量效率和减小存储器需求为三个目标。以研究图像传感器片上图像压缩的机制为切入点，以“图像压缩算法-模拟数字转换-位图处理单元”的结构化分解为手段。在前期成果的基础上，系统地研究基于“压缩-量化-存储”的图像传感器片上信号处理理论。探索基于连续逼近和单斜坡型电路结构的可重构式模拟数字转换器集成电路，并使之适用于超低功耗列并行式量化目标。提出创新的位图处理电路架构，基于数模混合集成电路结构，优化读出电路的功耗和面积。通过实现完整的高能效CMOS图像传感器单片集成电路，为实现国际领先的高性能成像系统提供坚实的理论和实践支撑。