低功耗III-V族非对称型MOSFET器件设计与可靠性研究

With the rapid growth of modern electronics technologies, traditional Si based CMOS integrated circuits are facing the bottleneck of power consumption. III-V materials with extraordinary electron mobility have been introduced to be an alternative to replace Si for continuing following the Moore's law. III-V MOSFETs have such disadvantages as large subthreshold leakage current, severe band-to-band tunneling and impact ionization effects, which have severely limited the power reduction of electronics systems. In this proposal, we propose an asymmetric InGaAs MOSFET structure. We propose a novel source/drain structure of heterogeneous materials as well as a new low-k spacer side-wall structure, and study their impacts on source/drain access resistance, parasitic capacitance, and the carrier transport situation, therefore provide new opportunities for lowering the static power consumption. Comprehensive solutions are proposed to mitigate the band-to-band tunneling and impact ionization effects of the devices, as well as to improve the frequency performances to reach sub-THz. Afterwards, reliability issues for newly designed InGaAs MOSFETs are studied. To build an accurate electrical model, RC network as well as the corresponding electrical parameters are introduced to model the border traps, band-to-band tunneling effect and impact ionization effect. This new type of "green" devices not only has potential applications in logic, analog, and mixed-mode ICs with low power consumption, but also provides a brand new angle for device design.

随着现代电子技术的飞速发展，传统的硅基CMOS集成电路在遵循摩尔定律时将面临功耗的瓶颈。为解决器件及芯片的功耗问题，III-V族高迁移率材料被引入作为可行性替代选择。然而，III-V MOSFET器件具有关态漏电流大，能带隧穿及离子化效应明显等缺点。本项目拟研究非对称型的InGaAs MOSFET结构，创新性的提出源、漏极不同材料的设计，引入低介电常数隔离层侧墙结构，并通过综合考量新设计和工艺对源、漏极接入电阻、寄生电容、以及载流子输运情况的影响，在降低关态漏电流及相关静态功耗的同时，提高器件的频率特性，实现低功耗亚太赫兹“绿色”器件。本项目拟对所提出的非对称型InGaAs MOSFET进行可靠性研究，并通过引入RC网络及相关电学参数，模拟边界陷进及隧穿、离子化效应，从而建立器件精确电学模型，为低功耗模拟及数模混合电路应用提供可行性器件基础，并为器件设计提供全新的思维理念。

根据研究目标，课题组进行了相应的理论、仿真和实验研究工作。在为期三年的研究中，在非对称型InGaAs MOSFET 器件结构设计、模拟仿真、及工艺实现；Low-k 隔离侧墙的设计、模拟仿真、及工艺实现；PBTI、HCI 可靠性测试分析；新型二维材料（MX2）材料的生长及对应器件工艺四个方面开展工作，取得了一些有意义的研究成果。首次提出对InGaAs MOSFET器件进行源、漏极隔离侧墙结构设计，并完成了工艺实现，解决了小禁带材料因漏极电场较高而造成的漏电流较大问题，同时利用隔离侧墙降低了器件的源漏极寄生电容，从而提高了器件的频率特性；完成了对非对称型InGaAs器件的相关电学性能测试，解释了阈值漂移的原因为漏极边缘一次和二次电子的捕获，而通过隔离侧墙有效缓解了进入栅氧的电场以及对应电子捕获；优化了射频去嵌方法，搭建了射频自动测试平台，在DC-110GHz频率范围内，考虑了矢量误差、电磁干扰、温度漂移影响，优化了测试精度；与比利时微电子研究中心IMEC合作，进行了新型二维材料MX2的制备研究以及器件探索，首次探讨了二维过渡金属双硫属元素化物在金属有机气相外延（MOVPE）过程中改变生长条件对衬底表面的影响，研究了在不同温度下蓝宝石衬底上二硫化钼（MoS2）的生长情况，相关成果发表于Nanotechnology。