SiC BJT功率器件复合电流瞬态输运模型及新结构的研究

Aiming to challenge with the electrical performance degeneration of wide bandgap semiconductor SiC BJT power electronics device due to the interface traps, this project conducts the research of fundamental theory and experiment of SiC BJT power device based on advanced SiC process platform. Considering the application of fast switching, two dimensional model of interface transport current coupling with the transient interface traps distribution is presented. The model of interface recombination current transient transport is proposed including that the mechanism on generation-recombination process of transient interface traps, and the degeneration mechanism of the electrical prosperities for the trap effect. Based on the model research,novel structures of suppression traps are proposed.Surface passivation layers are designed to form suppression electric field and reduce the carriers recombination on the surface.By fabricating interface passivation layer, it is sucessful to shield the carriers transport effects by interface traps. The novel devices' research focuses on studying the device physics,designing the SiC BJT structures by the model and simulation tool and fabricating the feasible devices compatible with traditional device process. The final objective is to fabricate the novel 1200V SiC BJT with both high performance and high stability. To develop the application of basic research of SiC BJT power device, it will help to overcome the research bottlenecks of the state of the art and establish the theoretical and technical foundation for the practical application of SiC power electronics devices in China.

针对宽禁带半导体SiC BJT电力电子器件的界面陷阱严重退化电学特性的挑战，本项目依托先进的SiC工艺平台，开展新型结构的高功率SiC BJT器件的基础理论和实验研究。面向高速开关状态的应用环境，提出时变的界面陷阱分布和电流输运相耦合的二维模型。研究界面陷阱瞬态的产生复合机理，建立界面复合电流的瞬态输运模型，探索陷阱效应对器件性能退化的影响机制。在模型研究的基础上提出抑制界面陷阱的新结构，通过界面钝化层形成抑制电场，降低载流子在表面的复合，屏蔽陷阱对基区载流子输运的影响。研究新结构的器件物理机理，以输运模型为基础，以仿真分析为手段，优化器件性能；研究新结构的工艺可实现性及与传统结构的工艺兼容性；最终研制出高性能与高稳定性兼备的新型1200V SiC BJT功率器件。开展SiC BJT功率器件界面钝化技术的应用基础研究，将有助于克服现有器件的研究瓶颈，为SiC器件的实用化建立理论和技术基础。

研究功率 SiC BJT 器件界面陷阱中载流子产生复合过程的物理机理，在稳态模型基础上建立界面复合电流瞬态输运模型。通过输运模型的研究，为SiC BJT器件抑制界面陷阱效应的新结构设计和工艺实现提供理论依据。针对SiC BJT外基区钝化处高界面态密度导致器件电流增益降低、器件电性能退化等问题，开展新型 SiC BJT 界面钝化结构的器件物理的研究。研究钝化层对陷阱效应的抑制机理与新结构的基区载流子输运特性和工作机理。通过理论研究和结构优化，新结构的器件性能显著提高，P+钝化层新型结构、发射极金属延伸结构、负离子注入结构的最大电流增益比传统结构分别提高了80%、63.2%和59.3%。研究新型 SiC BJT 器件的工艺条件，研究工艺的兼容性与可实现性，设计工艺流程，完成器件流片。以模型为基础，以器件仿真软件为设计工具，以流片和工艺实验为手段，研究陷阱效应的抑制机理，和新结构的优势和创新性，最终研制出高性能与高稳定性兼备的新型 1200V SiC BJT 功率器件。开展 SiC BJT 功率器件界面钝化技术的应用基础研究，将有助于克服现有器件的研究瓶颈，为 SiC 器件的实用化建立理论和技术基础。