铪基稀土高k栅介质外延薄膜的微结构调制及其介电性能研究

Hf-based amorphous gate dielectrics in use would face a great challenge of applying to 16 nm and the following technology node，such as (equivalent oxide thickness) EOT<0.5nm, large band gap and offset, low leakage current density. There is one of best methods to epitaxially grow high k dielectrics films. However, it is usually difficult to grow epitaxial films on cubic substrates, due to monoclinic phase of HfO2 at room temperature. Cubic Lattice stability, lattice parameters, band gap and defect of HfO2 are greatly affected by doping Gd or La, but the related system experiments and basic theories have not been made. This project is intended to make research of GdHfO and LaHfO epitaxial high k gate dielectrics. Internal mechanisms of crystal structure and lattice parameter between Gd or La and HfO2 will be studied. Action mechanisms of band gap, oxygen vacancies, interface reaction and defects in doped epitaxial HfO2 films will be discussed too. Crystal and energy properties could be controlled during the preparation. Basic date of epitaxial films will be given. The research results will provide theoretical guides of composition and process design for applications of high k dielectrics in the future nanometer integrated circuit on the base of the combination of electrical properties and related basic theory. At last, we will obtain key regulation technologies of lattice, energy band and defect state and provide scientific basis for 16 nanometer and following technology node.

目前非晶铪基高k栅介质在16 nm及以下技术节点应用时将面临更严峻的挑战：等效氧化物厚度不大于0.5 nm，带隙以及带隙偏移要足够大，漏电流要足够小。外延高k栅介质薄膜被认为是实现此目的最佳方法之一。然而，常态下HfO2的晶体结构为单斜相，很难在立方结构衬底上外延生长。稀土Gd、La的掺入对HfO2正方相或立方相稳定性、晶格参数以及相应的带隙、缺陷等有较大影响，为实现外延提供可能，然而目前缺乏系统的实验且尚未建立相关的理论研究。本项目拟展开GdHfO和LaHfO单晶高k栅介质薄膜的研究，研究Gd和La掺杂对HfO2晶体结构和晶格参数作用机制，以及其对HfO2外延薄膜带隙、氧空位、介电性能、界面反应和缺陷的作用机理，实现对结构特性及能带特性的调控。同时结合介电性能表征进行理论探讨，为铪基稀土高k栅介质在未来纳米集成电路中的应用提供科学依据。

随着集成电路45 nm和32 nm技术节点的来临, 高介电常数（高k）材料作为栅介质已取代传统的SiO2 成功地用于金属氧化物半导体场效应管器件(metal-oxide-semiconductor field-effect transistors, MOSFET)。然而，下一代集成电路中，非晶Hf基高k材料的亚稳定以及介电常数不理想，存在可靠性问题。在器件的使用过程中，栅介电层产生的晶界会造成很大的栅漏电流密度而导致器件失效。直接在沟道材料上实现栅介电层的外延生长是一种避免非晶介电层问题的合理办法。. 本项目完成了La、Gd掺杂的HfO2 （GDH）栅介质薄膜外延于Si（001）衬底，并且被证实具备立方相结构以及良好热稳定性。采用脉冲激光沉积技术（PLD）在Ge、Si等衬底上外延了GDH 高k栅介质薄膜，并且通过RHEED技术对薄膜外延生长的影响因素进行了分析，最后对GDH薄膜进行了电学性能研究。. 开展了基于CeO2外延薄膜在不同衬底上的制备及阻变性能研究。学性能测试显示该器件具有优异的阻变存储性能,开关比较大,离散性较小,可重复性和数据保持能力良好。进一步的实验及分析证明该器件的阻变效应属于界面阻变机制且来源于CeO2/NSTO界面。载流子的捕获/释放以及氧空位的运动是高低阻态转变的主要原因。