可调焦激光雷达接收芯片构架及关键技术研究

Laser radar (LADAR) can draw three-dimensional images of targets with high accuracy, strong elusiveness and good anti-interference ability. It has great potential in the field of precision guidance, pilotless and other military or civilian areas. In order to expand the field of view and improve the detection distance and accuracy, LADAR is moving in the linear mode avalanche photodiode (APD) and integrated chip direction. However, the large APD arrays on which line-scan LADARs and flash LADARs rely have problems of poor cell consistency, low yield and high cost, and also the corresponding receiver circuits consist in complex structure, high power consumption and large size, which seriously restricts the performance improvement and market application of LADAR. In order to reduce the LADAR performance requirements on the photodiode and improve the detection accuracy and detection distance, this project intends to adopt nanoscale CMOS process to carry out research on the architecture and key technologies of a novel three-dimensional imaging LADAR receiver chip, to explore a focusing LADAR receiver system based on the 4-cell segmented large pixel APD, and to break through a series of key technologies include identification and switching of detection modes, detection of large dynamic range narrow echoes, gating and summation of analog macro-pixels, and high-precision detection of time of flight. Finally, this project aims to complete the front-end receiver chip design and prototype test of the focusing three-dimensional imaging LADAR with low cost, long distance and high precision.

激光雷达（LADAR）能绘制三维图像，精度高、隐蔽性好、抗干扰能力强，在精确制导、无人驾驶等军民领域均有很大的应用潜力。为了扩大视场范围、提高探测距离和探测精度，LADAR正朝着线性模式雪崩光电二极管（APD）和集成化方向发展，但长线列扫描式和面阵闪光式LADAR所依赖的大APD阵列存在着像元一致性差、良率低、成本高等问题，且对应的接收处理电路结构复杂、功耗高、体积大，严重制约了LADAR的性能提升和市场应用。为了降低LADAR对光电传感器的要求，提高探测精度和探测距离，本项目拟采用纳米级CMOS工艺，开展新型三维成像LADAR接收芯片架构及其关键技术研究，探索基于4像元分割式大像素APD的可调焦LADAR接收系统，突破探测模式识别与切换、大动态范围窄回波检测、模拟宏像素选通及求和、高精度飞行时间检测等关键技术，完成低成本、远距离、高精度三维成像LADAR的前端接收芯片设计和原理样机测试。

高性能激光雷达接收器是半导体器件、工艺、混合信号集成电路设计的重要前沿和关键难点，为了提高三维成像激光雷达的探测精度和探测距离，降低激光成像雷达对光电传感器一致性的要求，并降低激光雷达的经济成本，本项目对多通道线性模式激光雷达模拟前端系统架构、大动态范围前端接收电路及峰值检测保持技术、以及高精度高线性度时间数字转换技术进行了深入研究。.研究了适用于线阵列激光雷达应用的多通道接收器模拟前端系统架构。提出了大阵列通道模拟前端电路单片集成技术，提高了激光雷达接收器并行处理回波信号能力；在每一个接收器通道模拟前端电路中，提出的跨阻预放大器和后级放大器一体化集成方式，提升了接收器通道带宽；该前端电路在物理设计时采用多重隔离技术以抑制接收器通道之间存在的信号串扰。.研究了适用于线性模式激光雷达的大动态范围前端接收电路及峰值检测保持技术。在电流镜模式的跨阻放大器中，嵌入了源级跟随器，能够有效降低输入阻抗，提高电路带宽；采用三段式增益切换策略，与固定增益跨阻放大器相比，显著提升了电路的线性动态范围；通过钳位放大器将复位电压钳位在共模电压，能够显著减小台阶误差，通过引入可变电流源，可有效降低了峰值检测电路的过冲与台阶误差。.研究了适用于直接飞行时间激光雷达接收机的高精度时间数字转换电路。采用基于统一参考的计数方案，能够显著地提高电路线性度。电路采用三级量化结构，前两级为整数计数级与内插级，基于所提出的统一参考计数方案，能够有效地抑制亚稳态误差以及多层量化之间的非线性误差。此外，电路在第三层量化中采用游标法，能够进一步地提高时间数字转换器的分辨率。.以上研究内容在提升激光雷达探测性能的同时，进一步促进了激光雷达系统的小型化。