面向高效多结电池、基于深宽比位错捕获技术的InP/GaAs 异质外延研究

Based on the requirement of broadband absorption and current-match, it is the best scheme for III-V tandem solar cells to achieve high efficiency that GaAs-based solar cells are monolithically integrated with InP-based solar cells. However, such scheme realization is challenging due to the big lattice-mismatch and thermal-mismatch between GaAs and InP material. Meanwhile, it is limited application for the conventional heteroepitaxial growth technology, such as strained buffer layer technique and epitaxy lateral growth technique, to be employed in-between GaAs-based solar cells and InP-based solar cells, because the thick buffer layer will increase the cost, and smaller effective active area will weaken the absorption. Recently, high quality GaAs(Ge)/Si heteroepitaxial growth have been reported, in which, the novel principle of aspect ratio trapping (ART) is employed to control interface threading dislocation within several hundred nanometers..Based on the above consideration, we propose that such ART principle is employed in InP/GaAs heteroepitaxial growth to control its interface threading dislocation also. InP growth in high-aspect -ratio-nanopatterned GaAs substrate is achieved by selective area MOCVD growth technique and epitaxial lateral growth technique. Their suppression mechanism of both the threading dislocation in InP/GaAs interface and the defaults in the coalescence region is systematically investigated through TEM characterizing and analyzing of the samples grown on the different patterned substrates or in the different growth conditions. Thereafter, chemical mechanical polishing, surface treatment and InP buffer layer growth are processed on the above high quality InP sample. Further exploration of InP film quality dependent on these processing and growth conditions is made through TEM, CL, PL and Hall characterization and analysis. Finally, device-level InP film on such high-aspect-ratio-nanopatterned GaAs substrates is expectedly achieved, which definitely benefits III-V tandem solar cells to achieve high conversion efficiency and other InP-based optoelectronic devices to reduce their cost.

基于宽谱吸收和电流匹配，GaAs与InP基多结电池单片集成是高效太阳电池优选方案，但二者大的晶格失配和热失配使得该方案极具挑战，且缓冲层技术和横向外延技术受限于厚缓冲层和小有效面积带来的成本增加和吸收减弱。近来，深宽比位错捕获技术使得GaAs/Si异质外延的穿透位错控制在几百纳米内，且薄膜质量与同质外延相当。因此，本项目提出将该技术应用于InP/GaAs异质外延。在高深宽比图案化GaAs衬底上，依次采用选区和横向外延技术生长InP，结合TEM表征分析，系统研究不同衬底形貌和MOCVD外延条件对界面穿透位错和薄膜聚合缺陷的抑制规律；进而采用化学机械抛光、抛光后InP表面处理和缓冲层生长技术，结合TEM、CL和PL等表征手段，揭示出相关因素影响InP薄膜质量规律，最终获得器件级InP薄膜。实施该项目，不仅为宽谱高效III-V族多结电池集成奠定基础，也为其他GaAs基InP光电器件提供思路。

本项目针对InP材料在GaAs(Si)衬底外延的现实需求和实际挑战，探索采用高深宽比位错捕获技术实现InP异质外延的可行性，为未来实现InP系器件在GaAs（Si）衬底集成奠定基础。.执行期间，主要研究了衬底图案化技术、纳球光刻图案化GaAs衬底的InP异质外延、步进式光刻图案化Si衬底的InP异质外延。.其中，在衬底图案化j技术研究中，我们将纳球光刻应用于GaAs衬底图案化，干涉光刻和步进式光刻应用于Si衬底图案化。这里，采用步进式光刻，我们获得了6英寸均匀的、不同周期高深宽比图案化Si衬底，该种衬底图案化技术为基于图案化衬底材料和器件奠定产业化基础。.在纳球光刻图案化GaAs衬底InP外延研究中，我们发现：（1）与缓冲层技术相比，位错捕获技术生长的薄膜没有穿透位错畴；（2）InP在图案区选择性生长；（3）高温使InP表面粗糙度陡增，高压高V/III比可抑制薄膜粗糙度到埃量级；（4）InP结晶质量随生长温度和生长压力增加而增加；（5）生长条件对材料貌相的影响取决于GaAs（InP）的表面能、GaAs/InP的界面能之间的关系，上述研究为未来开展二维图案化GaAs衬底InP异质外延奠定基础。.在步进式光刻图案化Si衬底InP外延中，我们发现：（1）生长温度决定成核模式、成核大小和密度；（2）V/III比和图案周期调控成核尺寸和密度；（3）（100）晶面优先成核，且成核密度高，尺寸小；（111）晶面则趋向成核团聚，尺寸大，且分散，不利材料二维生长；（4）在所有高温生长中，InP在介质沟槽内是(111)面速率限制生长，越出介质沟槽则表现为高指数面生长；（5）InP材料在（-110）方向生长不连续，难以成膜，其不连续程度受生长温度影响；（6）随生长温度降低，高温生长的InP材料PL峰值波长红移，半峰宽减少，直到接近InP衬底的PL峰值和半宽；（7）图案化衬底生长的InP材料PL谱峰值波长和半峰宽随着生长周期变小而改善；（8）InP材料内，缺陷呈V字形被过滤，使得顶层InP缺陷减少、质量高。上述研究为进一步开展图案化Si衬底InP外延奠定基础。.在项目执行过程中，发表SCI文章6篇，核心期刊文章1篇，授权发明专利2项，申请发明专利5项，参加国际国内会议5人次，培养研究生4名，完成项目要求。