Under the demand of the rapid development of information technology, the size of transistors, which are the core component of chips, is getting smaller and smaller, thus electrostatic control and power consumption are the prominent bottlenecks for the development of traditional semiconductors. The channel size of traditional semiconductors cannot fulfill the requirements of the next-generation transistors. It is urgent to search new channel materials. The novel and anisotropic two-dimensional (2D) semiconductors (2D IV-V group semiconductors including GeAs, GeP, SiAs, and SiP) have great potential to be the channel material of field effect transistors in the next decade. In the project, we plan to optimize the interfaces between 2D IV-V group semiconductor and metals and study the performance limits of the transistors of these semiconductors. To get the optimal interfacial configuration with small Schottky barrier height, we firstly study the interfaces between bulk metals and the novel 2D IV-V group semiconductor and then adopt 3D raised contact and 2D metals to optimize these interfaces by using density functional theory and quantum transport simulations. We plan to explore the anisotropy of the interfacial properties and transport properties of these semiconductors and expect that it can provide new ideas to the design of anisotropic transistors. The pivotal properties of transistors of 2D IV-V group semiconductors, such as on-state current, delay time, and subthreshold swing, will be calculated by quantum transport simulations. We will optimize the performance of the transistors and design the transistors to fulfill the requirement of the international technology roadmap for semiconductors (ITRS) for the next-generation transistors.
信息技术的迅速发展需要芯片核心部件晶体管的尺寸越来越小,由此带来的静电控制问题和能耗问题成为制约芯片发展的主要瓶颈。传统半导体无法满足下一代晶体管沟道尺寸的要求,迫切需要开发新型沟道材料。新型各向异性二维半导体材料(二维IV-V族半导体:GeAs,GeP,SiAs,SiP)有望成为下一代场效应晶体管的沟道材料。本课题拟研究单层、多层IV-V族半导体晶体管的界面优化及性能极限。运用密度泛函理论和量子输运模拟,研究其与块体金属的界面接触,采用三维提升接触构型及二维金属材料对界面进行优化,获得肖特基势垒低的界面结构;探究该类二维材料界面性质和输运性质的各向异性,为各向异性电子器件的设计提供新思路;通过量子输运计算亚10nm二维IV-V族半导体晶体管的开态电流、延迟时间、亚阈值摆幅等关键参数,优化器件性能,设计满足国际半导体技术发展路线图要求的下一代电子器件。
信息技术的迅速发展需要芯片核心部件晶体管的尺寸越来越小,由此带来的静电控制问题和能耗问题成为制约芯片发展的主要瓶颈。传统半导体无法满足下一代晶体管沟道尺寸的要求,迫切需要开发新型沟道材料。新型二维半导体材料(硅烷和二维IV-V族半导体等)有望成为下一代场效应晶体管的沟道材料。本课题研究了硅烷、单层IV-V族半导体和单层Tl2O晶体管的界面势垒和亚10 nm器件的性能极限。运用密度泛函理论和量子输运模拟,研究其与块体金属的界面接触,采用二维金属材料对界面进行优化,获得肖特基势垒低或欧姆接触的界面结构;探究二维材料界面性质和输运性质的各向异性,为各向异性电子器件的设计提供新思路;通过量子输运计算亚10 nm硅烷和二维IV-V族半导体晶体管的开态电流、延迟时间、亚阈值摆幅等关键参数,优化器件性能,设计满足国际半导体技术发展路线图要求的下一代电子器件。. 锂硫电池因具有较高的比容量和能量密度,被认为是最具前景的下一代电池体系之一,多硫化物的“穿梭效应”导致的循环稳定性差等问题严重阻碍了其发展,寻找和设计适用于锂硫电池的正极材料具有重要意义。在本项目的支持下,我们额外开展了二维碳基纳米材料在锂硫电池的理论研究,构筑了锚固同核过渡金属二聚体的单层C2N以及缺陷石墨烯-MoS2异质结的碳基纳米结构,并开展其作为锂硫电池正极载体的第一性原理研究。通过分析电子结构、多硫化物的吸附能和催化吉布斯自由能,研究了它们作为锂硫电池正极材料的潜力。为碳基纳米材料在锂硫电池的应用提供了理论指导和新思路。
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数据更新时间:2023-05-31
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