应用于2.5维集成的微纳尺度下超低阻硅垂直互连结构的电学、 光学与热力学机理研究

基本信息
批准号:61774015
项目类别:面上项目
资助金额:63.00
负责人:陈志铭
学科分类:
依托单位:北京理工大学
批准年份:2017
结题年份:2021
起止时间:2018-01-01 - 2021-12-31
项目状态: 已结题
项目参与者:丁英涛,郭芃,熊苗,程志强,常奕,张子岳,肖磊,谢奕
关键词:
同轴垂直互连热机械可靠性TSV25维集成光电同传复用垂直互连
结项摘要

In order to satisfy the urgent requirements of future consumer electronics for high performance, low power and miniaturized graphic processing and parallel computing systems, as well as the needs for larger data transmission bandwidth, lower power dissipation, and higher speed chip-to-chip communication, 2.5-dimensional integration technology, also referred to as interposer technique, which is based on the through-silicon-via (TSV) technique, is proposed and has been a research hotspot in the field of advanced three-dimensional packaging due to its strong heterogeneous integration capability, high integration density, low cost, and high reliability..This project takes advantages of high conductivity of the heavily-doped ultra-low-resistivity silicon (ULRS) as well as the insulation and optical properties of polymers, and is aiming to explore the electrical, optical and thermo-mechanical mechanisms of a novel ULRS TSV for 2.5-dimensional integration applications, which is a cutting-edge research area and needs multidisciplinary cooperation. Based on the standard MEMS microfabrication technology and ULRS substrate, high performance and high density coaxial TSVs as well as optical-electrical-multiplexing TSVs (OEM TSVs) and their thermo-mechanical reliability will be investigated comprehensively by theoretical analyses, modeling, simulation, and experimental studies. The proposed ULRS interposer structures, featuring high crosstalk immunity, excellent signal integrity, good impedance matching, and suitable for ultra-high speed chip-to-chip communication, have not only academic significance in the design and implementation of multi-energy domain system-level three-dimensional chip integration, but also high value in practical applications and broad market prospects.

为满足未来消费电子领域对于图形处理和计算系统高性能、小型化和低功耗的迫切需要以及更大数据传输带宽、更小功耗和更高速的芯片间通信的需求,以垂直硅通孔(TSV)为基础的2.5维硅插入层技术,由于具有异质集成能力强、成本低、集成密度高、可靠性高等优点,正逐渐成为先进三维封装领域的研究热点。.本项目利用超低阻硅的导电特性和高聚物的绝缘/光学特性,旨在研究应用于2.5维集成的超低阻硅垂直互连结构在电学、光学与热力学等多物理场中的机理问题,属于多学科交叉的前沿领域。基于标准的MEMS工艺和超低阻硅衬底,采用理论分析、仿真建模和测试验证相结合的方法,深入开展高性能、高密度同轴垂直互连、光电同传复用垂直互连和三维热-机械可靠性的研究,充分发挥其抗串扰能力强、信号完整性好、易于阻抗匹配及适用于超高速芯片间通信的特点,对于多能域三维系统级芯片集成的设计与实现具有重要的学术意义、实际应用价值和广阔的市场前景。

项目摘要

本项目旨在突破以垂直硅通孔(TSV)为基础的转接板技术,为实现高速、低功耗、低噪声、小型化、轻型化的超大规模集成电路与异质异构微系统,同时为具有更大数据传输带宽、更小功耗的芯片间光互连结构提供坚实的技术储备。从材料选择、结构优化、工艺突破等方向对TSV技术进行了优化,主要研究成果有:(1)引入介电常数极低的空气作为绝缘层,同时采用超低阻硅(Ultra Low Resistivity Silicon,ULRS)作为中心导体,基于所提出的双面部分重叠的半环形槽刻蚀新工艺,提出并实现了硅-空气-硅(Silicon-Air-Silicon,SAS)TSV结构。拥有极佳的电学性能和热-机械可靠性,寄生电容密度低至0.137 nF/cm2,20 V偏压下泄漏电流密度低至3.85 nA/cm2;(2)利用单元生死和子模型技术,将工艺残余应力和扇贝状波纹缺陷引入到 TSV 应力分布的分析评估中,从分析流程的完整性和分析模型的精准性两方面改善了仿真分析的精度和效率;利用多物理场耦合分析和子模型技术,分析评估了扇贝状波纹会导致 TSV不同材料界面处产生电流密度、热流密度、von Mises应力以及原子浓度的波动现象;(3)提出了采用ULRS代替金属铜作为内外导体的新型BCB绝缘层ULRS同轴TSV结构,可作为低成本2.5D转接板技术实现无源/微波等器件的高密度集成。考虑硅材料的半导体效应,建立了ULRS同轴TSV结构的等效电学模型,与S参数测试对比,验证了等效电学模型的合理性。电学测试结果表明S11和S21在0~20GHz频段范围内分别低于-20 dB和高于-0.47 dB;(4)为满足微光机电系统器件的异质集成对更大深度光电同传复用垂直互连TSV结构的需求,开发了具有较大深度的聚合物核表面传输型TSV,给出了一套适用于大尺寸中空TSV结构的低成本、低工艺复杂度、低工艺温度的工艺流程,实现了直径65 um,深度280 um的BCB填充表面传输型TSV结构制备。本项目关键技术的突破,为推动器件基础研究快速走向应用,服务国家重大需求奠定技术基础,具有重大的学术意义和极高的实际应用价值。

项目成果
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暂无此项成果

数据更新时间:2023-05-31

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