To design pixel driving circuits for AMLCD and AMOLED, it needs accurate polycrystalline TFT models. Therefore, reasonable models of polycrystalline TFTs suitable for circuit simulators are significant for the integrated circuit industries. Surface-potential-based models are advanced technology for semiconductor devices modeling; however, analytical surface potential calculation brings the main obstacle in the surface-potential-based drain current model for polycrystalline TFTs. Based on the previous research results, this project is planned to further study the following issues. Firstly, accounting for the complete energy distribution of trap state density in grain boundaries, i.e., both exponential band-tail states and Gaussian deep states, and including the front- and back- surface potentials related to the thin film thickness, an analytical calculation to surface potential is obtained by using Lambert W function. The proposed solution can greatly improve the calculation efficiency of circuit simulators. Secondly, based on surface potential, a unified drain current model is established, taking several unique effects of polycrystalline TFTs into account. Thirdly, the model is implemented into circuit simulator, and an accurate parameter extraction is proposed. Fourthly, the model is verified by comparisons with numerical results, TCAD simulation, experimental data and circuit simulation. Compared to other polycrystalline TFT models, the proposed model are physical-based and suitable for most types of polycrystalline TFTs. Further, it is practical for circuit simulators.
设计AMLCD 和AMOLED 像素驱动等电路需要准确的多晶硅TFT 模型,因此,合理的模型对集成电路产业具有深远意义。基于表面势的模型是半导体器件建模的先进技术,但应用于多晶硅TFT漏电流模型的研究上,存在表面势解析计算的技术瓶颈。本项目在前期多晶硅TFT建模工作基础上,进一步深入研究的内容包括:其一,综合考虑指数带尾态和高斯深能态结合的完整晶界陷阱态分布规律,以及与薄膜厚度相关的前和背表面电势的影响,利用Lambert W 函数解决表面势的解析求解问题,该算法可实现电路仿真器计算效率的提高;其二,基于表面势,建立统一电流模型,并考虑器件的特殊物理效应;其三,实现模型的电路仿真嵌入,建立一套准确高效的参数提取流程;其四,采用数值模拟、TCAD器件仿真、实验数据拟合及电路仿真器模拟的方法验证模型。本项目构建的模型与现有多晶硅TFT模型比较,具有物理意义明确、普适等特点,可应用于电路仿真器。
目前多晶硅薄膜晶体管(TFT)在新一代平板显示等产业中有深入的应用,深入理解该器件的工作机理和模型,既是这种器件在集成电路芯片设计中的基础和重要过程,也是相应电路CAD工具的核心组成部分。本项目以基于表面势的电路模型为思路,围绕建立完整准确且计算高效的多晶硅TFT电学特性模型为研究目标,对相关的问题进行了深入的研究,并获得了一系列的研究成果。首先,结合完整的陷阱态分布信息,包括高斯深能态和指数带尾态,对包括前表面和背表面的电势进行了显式的解析计算。提出了前表面和背表面的耦合关系,从而使得泊松方程可解。提出的算法与数值仿真结果比较可见,算法准确且计算量小,十分适合应用到电路仿真器中。其次,基于准二维的方法,对离散晶界上的势垒高度提出了显式计算方法。晶界势垒高度的准确计算对迁移率及电流模型有重要作用。因此,基于表面势和晶界势垒高度,建立了完整统一的多晶硅TFT直流模型,可适用于多晶硅TFT的全部工作区间,包括泄漏区、亚阈值区、开启区(含线性区和饱和区)和kink 区。在上述工作的基础上,实现了模型的仿真器嵌入,并在完成了模型的验证工作。相关的研究成果已发表在IEEE Electron Device Letters,Solid-State Electronics等权威学术期刊上。
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数据更新时间:2023-05-31
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